SH7052 datasheet(234/919 Pages) RENESAS

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• Bit 0—Counter Start 11 (STR11): Starts and stops free-running counter 11 (TCNT11).

Bit 0: STR11

Description

TCNT11 is halted

(Initial value)

TCNT11 counts

10.2.2

Prescaler Registers (PSCR)

The prescaler registers (PSCR) are 8-bit registers. The ATU-II has four PSCR registers.

Channel

Abbreviation

Function

0, 1, 2, 3, 4, 5, 8, 11

PSCR1

Prescaler setting for respective channels

PSCR2

PSCR3

PSCR4

PSCRx is an 8-bit writable register that enables the first-stage counter clock

φ' input to each

channel to be set to any value from P

φ/1 to Pφ/32.

Bit:

——

—

PSCxE

PSCxD

PSCxC

PSCxB

PSCxA

Initial value:

——

—

000

R/W:

——

—

WWW

x = 1 to 4

Input counter clock

φ' is determined by setting PSCxA to PSCxE: φ' is Pφ/1 when the set value is

H'00, and P

φ/32 when H'1F.

PSCRx is initialized to H'00 by a power-on reset, and in hardware standby mode and software

standby mode.

The internal clock

φ' set with this register can undergo further second-stage scaling to create clock

φ" for channels 1 to 8 and 11, the setting being made in the timer control register (TCR).

• Bits 7 to 5—Reserved. These bits cannot be modified.

• Bits 4 to 0—Prescaler (PSCxE, PSCxD, PSCxC, PSCxB, PSCxA): These bits specify

frequency division of first-stage counter clock

φ' input to the corresponding channel.

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