SH7052 datasheet(277/919 Pages) RENESAS

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• Bit 5—Count-Up/Count-Down Flag 6B (UD6B): Status flag that indicates the TCNT6B count

operation.

Bit 5: UD6B

Description

Free-running counter TCNT6B operates as an up-counter

Free-running counter TCNT6B operates as a down-counter

• Bit 4—Count-Up/Count-Down Flag 6A (UD6A): Status flag that indicates the TCNT6A count

operation.

Bit 4: UD6A

Description

Free-running counter TCNT6A operates as an up-counter

Free-running counter TCNT6A operates as a down-counter

• Bit 3—Cycle Register Compare-Match Flag 6D/7D (CMF6D/CMF7D): Status flag that

indicates CYLRxD compare-match.

Bit 3: CMFxD

Description

[Clearing condition]

(Initial value)

When CMFxD is read while set to 1, then 0 is written to CMFxD

[Setting conditions]

• When TCNTxD = CYLRxD (in non-complementary PWM mode)

•••• When TCNT6D = H'0000 in a down-count (in complementary PWM mode)

x = 6 or 7

• Bit 2—Cycle Register Compare-Match Flag 6C/7C (CMF6C/CMF7C): Status flag that

indicates CYLRxC compare-match.

Bit 2: CMFxC

Description

[Clearing condition]

(Initial value)

When CMFxC is read while set to 1, then 0 is written to CMFxC

[Setting conditions]

• When TCNTxC = CYLRxC (in non-complementary PWM mode)

•••• When TCNT6C = H'0000 in a down-count (in complementary PWM mode)

x = 6 or 7

SH7052 Datasheet(PDF) 277 Page - Renesas Technology Corp