SH7052 datasheet(278/919 Pages) RENESAS

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• Bit 1—Cycle Register Compare-Match Flag 6B/7B (CMF6B/CMF7B): Status flag that

indicates CYLRxB compare-match.

Bit 1: CMFxB

Description

[Clearing condition]

(Initial value)

When CMFxB is read while set to 1, then 0 is written to CMFxB

[Setting conditions]

• When TCNTxB = CYLRxB (in non-complementary PWM mode)

•••• When TCNT6B = H'0000 in a down-count (in complementary PWM mode)

x = 6 or 7

• Bit 0—Cycle Register Compare-Match Flag 6A/7A (CMF6A/CMF7A): Status flag that

indicates CYLRxA compare-match.

Bit 0: CMFxA

Description

[Clearing condition]

(Initial value)

When CMFxA is read while set to 1, then 0 is written to CMFxA

[Setting conditions]

• When TCNTxA = CYLRxA (in non-complementary PWM mode)

•••• When TCNT6A = H'0000 in a down-count (in complementary PWM mode)

x = 6 or 7

Timer Status Register 8 (TSR8)

TSR8 indicates the channel 8 one-shot pulse status.

Bit:

OSF8P

OSF8O

OSF8N

OSF8M

OSF8L

OSF8K

OSF8J

OSF8I

Initial value:

R/W:

R/(W)*

Bit:

OSF8H

OSF8G

OSF8F

OSF8E

OSF8D

OSF8C

OSF8B

OSF8A

Initial value:

R/W:

R/(W)*

Note: * Only 0 can be written, to clear the flag.

SH7052 Datasheet(PDF) 278 Page - Renesas Technology Corp

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