SH7052 datasheet(307/919 Pages) RENESAS

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Timer Interrupt Enable Register 11 (TIER11)

TIER11 controls enabling/disabling of channel 11 compare-match and overflow interrupt requests.

Bit:

——

———

OVE11

Initial value:

R/W:

R/W

Bit:

——

IME11B IME11A

Initial value:

R/W:

R/W

• Bits 15 to 9—Reserved: These bits always read 0. The write value should always be 0.

• Bit 8—Overflow Interrupt Enable 11 (OVE11): Enables or disables interrupt requests by

OVF11 in TSR11 when OVF11 is set to 1.

Bit 8: OVE11

Description

OVI11 interrupt requested by OVF11 is disabled

(Initial value)

OVI11 interrupt requested by OVF11 is enabled

• Bits 7 to 2—Reserved: These bits always read 0. The write value should always be 0.

• Bit 1—Compare-Match Interrupt Enable 11B (IME11B): Enables or disables interrupt requests

by IMF11B in TSR11 when IMF11B is set to 1.

Bit 1: IME11B

Description

IMI11B interrupt requested by IMF11B is disabled

(Initial value)

IMI11B interrupt requested by IMF11B is enabled

• Bit 0—Compare-Match Interrupt Enable 11A (IME11A): Enables or disables interrupt

requests by IMF11A in TSR11 when IMF11A is set to 1.

Bit 0: IME11A

Description

IMI11A interrupt requested by IMF11A is disabled

(Initial value)

IMI11A interrupt requested by IMF11A is enabled

SH7052 Datasheet(PDF) 307 Page - Renesas Technology Corp