SH7052 datasheet(309/919 Pages) RENESAS

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Bit 2: ITVE8

Description

Interrupt request (ITV1) by rise of TCNT0 bit 8 is disabled

(Initial value)

Interrupt request (ITV1) by rise of TCNT0 bit 8 is enabled

• Bit 1—Interval Interrupt Bit 7 (ITVE7): INTC interval interrupt setting bit corresponding to bit

7 in TCNT0. The rise of bit 7 in TCNT0 is ANDed with ITVE7, the result is stored in IIF1 in

TSR0, and an interrupt request is sent to the CPU.

Bit 1: ITVE7

Description

Interrupt request (ITV1) by rise of TCNT0 bit 7 is disabled

(Initial value)

Interrupt request (ITV1) by rise of TCNT0 bit 7 is enabled

• Bit 0—Interval Interrupt Bit 6 (ITVE6): INTC interval interrupt setting bit corresponding to bit

6 in TCNT0. The rise of bit 6 in TCNT0 is ANDed with ITVE6, the result is stored in IIF1 in

TSR0, and an interrupt request is sent to the CPU.

Bit 0: ITVE6

Description

Interrupt request (ITV1) by rise of TCNT0 bit 6 is disabled

(Initial value)

Interrupt request (ITV1) by rise of TCNT0 bit 6 is enabled

Interval Interrupt Request Registers 2A and 2B (ITVRR2A, ITVRR2B)

Bit:

ITVA13x ITVA12x ITVA11x ITVA10x ITVE13x ITVE12x ITVE11x ITVE10x

Initial value:

R/W:

R/W

x = A or B

• Bit 7—A/D0 / A/D1 Converter Interval Activation Bit 13A/13B (ITVA13A/ITVA13B): A/D0

or A/D1 (ITVRR2A: A/D0; ITVRR2B: A/D1) converter activation setting bit corresponding to

bit 13 in TCNT0. The rise of bit 13 in TCNT0 is ANDed with ITVA13x, and the result is

output to the A/D0 or A/D1 converter as an activation signal.

Bit 7: ITVA13x

Description

A/D0 or A/D1 converter activation by rise of TCNT0 bit 13 is disabled

(Initial value)

A/D0 or A/D1 converter activation by rise of TCNT0 bit 13 is enabled

x = A or B

SH7052 Datasheet(PDF) 309 Page - Renesas Technology Corp