SH7243 datasheet(425/1726 Pages) RENESAS

425 / 1726 page

Section 10 Direct Memory Access Controller (DMAC)

Rev. 1.00 Jun. 26, 2008 Page 395 of 1692

REJ09B0393-0100

Bit

Bit Name

Initial

Value

R/W

Descriptions

R/W

Acknowledge Mode

Specifies whether DACK is output in data read cycle or

in data write cycle in dual address mode.

In single address mode, DACK is always output

regardless of the specification by this bit.

This bit is valid only in CHCR_0 to CHCR_3. This bit is

reserved in CHCR_4 to CHCR_7; it is always read as

0 and the write value should always be 0.

0: DACK output in read cycle (dual address mode)

1: DACK output in write cycle (dual address mode)

R/W

Acknowledge Level

Specifies the DACK (acknowledge) signal output is

high active or low active.

This bit is valid only in CHCR_0 to CHCR_3. This bit is

reserved in CHCR_4 to CHCR_7; it is always read as

0 and the write value should always be 0.

0: Low-active output from DACK

1: High-active output from DACK

Note: To use the DACK pins as high-active output, pull

them down and perform the following settings.

1. After the reset start, specify the high-active

output by this bit in CHCR for the DACK pins.

2. Then specify the DACK pins for the pin

function controller setting.

3. The DACK pin setting in CHCR should be

retained hereafter.

SH7243 Datasheet(PDF) 425 Page - Renesas Technology Corp