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SH7243 Datasheet(PDF) 183 Page - Renesas Technology Corp

Part # SH7243
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine family
PDF  1726 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7243 Datasheet(HTML) 183 Page - Renesas Technology Corp

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Section 6 Interrupt Controller (INTC)
Rev. 1.00 Jun. 26, 2008 Page 153 of 1692
REJ09B0393-0100
F
2 Icyc + 3 Bcyc + 1 Pcyc
3 Icyc + m1 + m2
m1
m2
m3
9 Icyc
IRQ
RESBANK instruction
D
EEEEEEEE
E
DE
E
M
M
M
E
F
D
[Legend]
m1:
m2:
m3:
Vector address read
Saving of SR (stack)
Saving of PC (stack)
Interrupt acceptance
First instruction in interrupt
exception service routine
Instruction (instruction replacing
interrupt exception handling)
Figure 6.7 Example of Pipeline Operation when Interrupt is Accepted during RESBANK
Instruction Execution (Register Banking without Register Bank Overflow)
F
2 Icyc + 3 Bcyc + 1 Pcyc
3 Icyc
m1
m2
m3
3 Icyc + m1 + m2
IRQ
DE
E
M
M
M
M
F
D
[Legend]
m1:
m2:
m3:
Vector address read
Saving of SR (stack)
Saving of PC (stack)
Interrupt acceptance
First instruction in interrupt exception
service routine
Instruction (instruction replacing
interrupt exception handling)
...
...
...
Figure 6.8 Example of Pipeline Operation when IRQ Interrupt is Accepted
(Register Banking with Register Bank Overflow)



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