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7540 Datasheet(PDF) 190 Page - Renesas Technology Corp |
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7540 Datasheet(HTML) 190 Page - Renesas Technology Corp |
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190 / 366 page ![]() 2-114 REJ09B0018-0200Z Rev.2.00 Jun 21, 2004 APPLICATION 7540 Group 2.6 Serial I/O1 Fig. 2.6.17 Setting method for UART of serial I/O1 (2) b7b0 00 b7 b0 1 1 Process 5: When BRG output/16 is selected as synchronous clock, set value to baud rate generator. Baud rate generator (BRG) [Address 1C16] Set baud rate value Process 4: Set UART control register. Select character length 0: 8 bits 1: 7 bits Select parity enable 0: Parity disabled 1: Parity enabled Select parity (valid only when parity is enabled) 0: Even parity 1: Odd parity Select stop bit length 0: 1 stop bit 1: 2 stop bits Select P11/TxD P-channel output disable (in output mode) 0: CMOS output 1: N-channel open-drain output UART control register (UARTCON) [Address 1B16] b7b0 Process 8: When transmitting, start serial data transmission (Note). Transmit/Receive buffer register (TB/RB) [Address 1816] Set transmit data Process 6: In order not to execute the no requested interrupt processing, set “0” (no requested) to the serial I/O1 transmit/receive interrupt request bit. Interrupt request register 1 (IREQ1) [Address 3C16] No serial I/O1 receive interrupt request issued No serial I/O1 transmit interrupt request issued Serial I/O1 receive interrupt enabled Serial I/O1 transmit interrupt enabled Interrupt control register 1 (ICON1) [Address 3E16] Process 7: When the interrupt is used, set “1” (interrupt enabled) to the serial I/O1 transmit/receive interrupt enable bit. Note: When data transmission is executed at the state that an external clock input is selected as the synchronous clock, set the transmit data while the SCLK1 is “H” state. |
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