7733 datasheet(605/940 Pages) RENESAS

605 / 940 page

APPENDIX

7733 Group User’s Manual

21–57

Symbols in machine instructions table

Description

Symbol

Description

Symbol

IMP

IMM

DIR

DIR, b

DIR, X

DIR, Y

(DIR)

(DIR,X)

(DIR), Y

L (DIR)

L (DIR),Y

ABS

ABS, b

ABS, X

ABS, Y

ABL

ABL, X

(ABS)

L (ABS)

(ABS, X)

STK

REL

DIR, b, REL

ABS, b, REL

(SR), Y

BLK

IPL

Implied addressing mode

Immediate addressing mode

Accumulator addressing mode

Direct addressing mode

Direct bit addressing mode

Direct indexed X addressing mode

Direct indexed Y addressing mode

Direct indirect addressing mode

Direct indexed X indirect addressing mode

Direct indirect indexed Y addressing mode

Direct indirect long addressing mode

Direct indirect long indexed Y addressing mode

Absolute addressing mode

Absolute bit addressing mode

Absolute indexed X addressing mode

Absolute indexed Y addressing mode

Absolute long addressing mode

Absolute long indexed X addressing mode

Absolute indirect addressing mode

Absolute indirect long addressing mode

Absolute indexed X indirect addressing mode

Stack addressing mode

Relative addressing mode

Direct bit relative addressing mode

Absolute bit relative addressing mode

Stack pointer relative addressing mode

Stack pointer relative indirect indexed Y

addressing mode

Block transfer addressing mode

Carry flag

Zero flag

Interrupt disable flag

Decimal operation mode flag

Index register length selection flag

Data length selection flag

Overflow flag

Negative flag

Processor interrupt priority level

Addition

Subtraction

Multiplication

Division

Logical AND

Logical OR

–

←

ACC

ACCH

ACCL

PCH

PCL

DPR

DPRH

DPRL

PSH

PSL

PSb

M(S)

ADG

ADH

ADL

i1, i2

Exclusive OR

Negation

Movement to the arrow direction

Accumulator

Accumulator’s upper 8 bits

Accumulator’s lower 8 bits

Accumulator A

Accumulator A’s upper 8 bits

Accumulator A’s lower 8 bits

Accumulator B

Accumulator B’s upper 8 bits

Accumulator B’s lower 8 bits

Index register X

Index register X’s upper 8 bits

Index register X’s lower 8 bits

Index register Y

Index register Y’s upper 8 bits

Index register Y’s lower 8 bits

Stack pointer

Program counter

Program counter’s upper 8 bits

Program counter’s lower 8 bits

Program bank register

Data bank register

Direct page register

Direct page register’s upper 8 bits

Direct page register’s lower 8 bits

Processor status register

Processor status register’s upper 8 bits

Processor status register’s lower 8 bits

Processor status register’s b-th bit

Contents of memory at address indicated by

stack pointer

b-th memory location

Value of 24-bit address’s upper 8-bit (A23–A16)

Value of 24-bit address’s middle 8-bit (A15–A8)

Value of 24-bit address’s lower 8-bit (A7–A0)

Operation code

Number of cycle

Number of byte

Number of transfer byte or rotation

Number of registers pushed or pulled

–

∨

∧

∨

Appendix 6. Machine instructions

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