7733 datasheet(75/940 Pages) RENESAS

75 / 940 page

7733 Group User’s Manual

3–6

PROGRAMMABLE I/O PORTS

3.2 Port peripheral circuits

Figures 3.2.1 and 3.2.2 show the port peripheral circuits.

3.2 Port peripheral circuits

Fig. 3.2.1 Port peripheral circuits (1)

• Ports P55/TA2IN/KI1, P57/TA3IN/KI3 , P62/INT0 to P64/INT2

Data bus

Pull-up selection

Pull-up

transistor

• Ports P54/TA2OUT/KI0, P56/TA3OUT/KI2

“1”

Output

Ports P50/TA0OUT, P52/TA1OUT , P60/TA4OUT, P75/AN5/ADTRG/TxD2, P82/RxD0/CLKS0 (Inside dotted-line included, and shaded area not included)

• Ports P83/TxD0, P87/TxD1 (Inside dotted-line not included, and shaded area included)

Notes 1: Valid only when used as pin

TxDj for Serial I/O.

2: Analog input is present only in

port P75.

N-channel open-drain

selection (Note 1)

Analog input

(Note 2)

Port P42/

(Inside dotted-line not included, and shaded area not included)

• Ports P00 to P07, P10 to P17, P20 to P27, P30 to P33, P43 to P46 (Inside dotted-line not included)

Ports P40/HOLD, P41/RDY, P47, P51/TA0IN, P53/TA1IN, P61/TA4IN, P65/TB0IN to P67/TB2IN/

f SUB, P86/RxD1 (Inside dotted-line included)

Data bus

Port latch

Pull-up selection

Output

Pull-up

transistor

“1”

Port direction register

Port latch

Port direction register

Port latch

Port direction register

Port latch

Port direction register

7733 Datasheet(PDF) 75 Page - Renesas Technology Corp

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