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7733 Datasheet(PDF) 610 Page - Renesas Technology Corp |
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7733 Datasheet(HTML) 610 Page - Renesas Technology Corp |
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610 / 940 page ![]() 7733 Group User’s Manual 21-62 APPENDIX (2) Wiring for clock I/O pins q Make the length of wiring connected to clock I/O pins as short as possible. q Make the length of wiring between the grounding lead of the capacitor, which is connected to the oscillator and pin Vss of the microcomputer, as short as possible (within 20 mm). q Separate the Vss pattern only for oscillation from all other Vss patterns. (Refer to Figure 21.) Reason The microcomputer’s operation synchronizes with a clock generated by the oscillation circuit. If noise enters clock I/O pins, clock waveforms may be deformed. This may cause a malfunction or a program runaway. Also, if the noise causes a potential difference between the Vss level of the microcomputer and the Vss level of an oscillator, the correct clock will not be input in the microcomputer. (3) Wiring for pin CNVss Connect pin CNVss to pin Vss with the shortest possible wiring. Reason The processor mode of the microcomputer is influenced by a potential at pin CNVss when pin CNVSS and pin VSS are connected. If the noise causes a potential difference between the two pins, the processor mode may become unstable. This may cause a malfunction or a program runaway. Fig. 13 Wiring for clock I/O pins Fig. 14 Wiring for pin CNVss Noise CNVss Vss CNVss Vss Not acceptable Acceptable M37733MHBXXXFP M37733MHBXXXFP Noise XIN XOUT Vss XIN XOUT Vss Not acceptable Acceptable M37733MHBXXXFP M37733MHBXXXFP Appendix 8. Countermeasure examples against noise |
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