7733 datasheet(743/940 Pages) RENESAS

743 / 940 page

APPLICATIONS

7735 Group User’s Manual

17–17

17.1 Memory expansion

Fig. 17.1.10 Bus buffer usage example (2) (when a memory which requires a long data hold time for writing

is connected)

DIR

ALS245A

BYTE

16 MHz

ALS573

DIR

ALS573

ALE

A16, A17

1D 1Q

F74

F04

XIN

XOUT

ALS245A

A8/D8 to

A15/D15

M37735MHBXXXFP

A0/D0 to

A7/D7

CNVSS

RDE

WEH

WEL

F32

F11 g1

Data bus (even)

Data bus (odd)

Address bus

These circuits make the rising edge of

the write signal earlier by 1/2

, so

that the write hold time is extended.

g1 Make sure that the propagation delay time is 20 ns or less.

Circuit conditions: Wait 1 is valid,

f(XIN)

f(XCIN)

g1, g2 Make sure that the following relationships are satisfied:

q The sum of propagation delay time of g1 and output disable time of g2 is 42.5 ns or less.

q The sum of propagation delay time of g1 and output enable time of g2 is 5 ns or more.

7733 Datasheet(PDF) 743 Page - Renesas Technology Corp

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