7733 datasheet(889/940 Pages) RENESAS

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17–9

APPLICATIONS

7736 Group User’s Manual

(2) Initial settings for related registers

Fig. 17.4.4 Initial settings for related registers

X: It may be “0” or “1.”

Timer B2 interrupt control register (address 7C16)

Interrupt priority level is set. (Note that a value other than “0002” is set.)

Interrupt request bit: 0 (Initialized)

Interrupt disable flag (I)

“0”: Interrupt is enabled.

INT0

interrupt control register (address 7D16)

Interrupt priority level is set. (Note that a value other than “0002” is set.)

Interrupt request bit: 0 (Initialized)

An interrupt request occurs at the falling edge.

Interval of the clock timer’s interrupt request

occurrence: 1 second

b15

Timer B2 register (addresses 5516 and 5416)

0316

FF16

Settings for the clock timer.

Timer B2 mode register (address 5D16)

101

The sub-clock oscillation circuit: oscillating

(Timer B2 functions as the clock timer.)

Oscillation circuit control register 0 (address 6C16)

In the wait mode, clocks

512

are stopped.

An external clock is selected as the main clock.

Watchdog timer is not used when the stop mode is terminated.

Oscillation circuit control register 1 (address 6F16)

XX 1 1

An external clock is selected as the sub clock and P76 functions as a port.

Watchdog timer is not used when the stop mode is terminated.

Must be fixed to “0.”

Note: When writing a value to this register, write a value of “5516” by using the LDM instruction,

and then write a value of “0A16.” (Refer to Figure 11.2.4.)

17.4 Power saving

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