7733 datasheet(122/940 Pages) RENESAS

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TIMER A

7733 Group User’s Manual

6–11

6.3.1 Setting for timer mode

Figures 6.3.2 and 6.3.3 show an initial setting example for registers related to the timer mode.

Note that when using interrupts, setting for enabling interrupts is required. For details, refer to chapter “4.

INTERRUPTS.”

6.3 Timer mode

Fig. 6.3.2 Initial setting example for registers related to timer mode (1)

g Counter divides the count source frequency by (n + 1).

Pulse output function selection bit

0: No pulse is output.

1: Pulse is output.

Selection of the timer mode and each function

Timer Ai mode register (i = 0 to 4) (addresses 5616 to 5A16)

X: It may be either “0” or “1.”

Clocks f2, f16, f64, and f512: Refer to chapter

“14. CLOCK GENERATING CIRCUIT.”

b7 b6

b4 b3

Gate function selection bits

0 X: No gate function

1 0: Counter counts only while pin TAiIN’s input signal level is “L.”

1 1: Counter counts only while pin TAiIN’s input signal level is “H.”

Count source selection bits

0 0: Clock f2

0 1: Clock f16

1 0: Clock f64

1 1: Clock f512

Timer mode is selected.

Setting of the division ratio

Values 000016 to FFFF16 (n) can be set.

(b15)

(b8)

Timer A0 register (addresses 4716, 4616)

Timer A1 register (addresses 4916, 4816)

Timer A2 register (addresses 4B16, 4A16)

Timer A3 register (addresses 4D16, 4C16)

Timer A4 register (addresses 4F16, 4E16)

Continued to

“Initial setting example for registers related to timer mode (2)”

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