7733 datasheet(211/940 Pages) RENESAS

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0: The

SERIAL I/O

7733 Group User’s Manual

8–8

0: At the falling edge of the transfer

clock, transmit data is output; at

the rising edge of the transfer

clock, receive data is input.

When not in transferring, pin

CLKi’s level is “H.”

1: At the rising edge of the transfer

clock, transmit data is output; at

the falling edge of the transfer

clock, receive data is input.

When not in transferring, pin

CLKi’s level is “L.”

0: The CTS/RTS function is enabled.

1: The CTS/RTS function is disabled.

(P80 and P84 function as

programmable I/O ports.)

(Valid when the CTS/RTS enable

bit is “0.”)

CTS

/RTS function selection bit

Bit

BRG count source selection bits

Bit name

At reset

0: Data is present in the transmission

1: No data is present in the transmission

Functions

0 0: Clock f2

0 1: Clock f16

1 0: Clock f64

1 1: Clock f512

UART0 transmit/receive control register 0 (address 3 416)

UART1 transmit/receive control register 0 (address 3C 16)

b1 b0

CTS

function is selected.

1: The RTS function is selected.

CTS

/RTS enable bit

Transmission register empty flag

Clocks f2, f16, f64, and f512: Refer to chapter “14. CLOCK GENERATING CIRCUIT.”

Note: Fix bits 6 and 7 to “0” in the UART mode.

Data output selection bit

0: Pin TxDi is set for CMOS output.

1: Pin TxDi is set for N-channel open-

drain output.

0: LSB (Least Significant Bit) first

1: MSB (Most Significant Bit) first

CLK polarity selection bit

(This bit is used in the clock

synchronous serial I/O mode.)

(Note)

Transfer format selection bit

(This bit is used in the clock

synchronous serial I/O mode.)

(Note)

Fig. 8.2.4 Structure of UARTi transmit/receive control register 0 (1)

8.2 Block description

8.2.2 UARTi transmit/receive control register 0

Figures 8.2.4 and 8.2.5 show the structure of UARTi transmit/receive control register 0. For bits 1 and 0,

refer to section “(1) Internal/External clock selection bit” in page 8-7. For bits 7 to 4, refer to the

description of each operating mode.

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