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2-2

APPLICATION

2.1 I/O pins

4513/4514 Group User’s Manual

2.1 I/O pins

The 4513/4514 Group has the twenty-eight I/O pins (eighteen I/O pins for 4513 Group), three input pins.

(Ports P20–P22, P30, P31, D6 and D7 are also used as serial I/O pins SCK, SOUT, SIN, and INT0, INT1,

CNTR0 and CNTR1 pins, respectively).

This section describes each port I/O function, related registers, application example using each port function

and notes.

2.1.1 I/O ports

(1)

Port P0

Port P0 is a 4-bit I/O port.

Port P0 has the key-on wakeup function which turns ON/OFF with register K0 and pull-up transistor

which turns ON/OFF with register PU0.

s Input/output of port P0

Data input to port P0

Set the output latch of specified port P0i (i=0 to 3) to “1” with the OP0A instruction. If the output

latch is set to “0,” “L” level is input.

The state of port P0 is transferred to register A when the IAP0 instruction is executed.

Data output from port P0

The contents of register A is output to port P0 with the OP0A instruction.

The output structure is an N-channel open-drain.

(2)

Port P1

Port P1 is a 4-bit I/O port.

Port P1 has the key-on wakeup function which turns ON/OFF with register K0 and pull-up transistor

which turns ON/OFF with register PU0.

s Input/output of port P1

Data input to port P1

Set the output latch of specified port P1i (i=0 to 3) to “1” with the OP1A instruction. If the output

latch is set to “0,” “L” level is input.

The state of port P1 is transferred to register A when the IAP1 instruction is executed.

Data output from port P1

The contents of register A is output to port P1 with the OP1A instruction.

The output structure is an N-channel open-drain.

(3)

Port P2

Port P2 is a 3-bit input port.

s Input of port P2

q Data input to port P2

The state of port P2 is transferred to register A when the IAP2 instruction is executed. However,

port P2 is 3 bits and A3 is fixed to “0.”

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