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H83069RF Datasheet(PDF) 148 Page - Renesas Technology Corp |
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H83069RF Datasheet(HTML) 148 Page - Renesas Technology Corp |
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148 / 1003 page ![]() Rev. 5.0, 09/04, page 126 of 978 6.2.6 Chip Select Control Register (CSCR) CSCR is an 8-bit readable/writable register that enables or disables output of chip select signals ( CS 7 to CS4). If output of a chip select signal is enabled by a setting in this register, the corresponding pin functions as a chip select signal ( CS 7 to CS4) output regardless of any other settings. CSCR cannot be modified in single-chip mode. ———— 0 Initial value 0 0 0 1111 Read/Write ——— — R/W R/W R/W R/W 76543210 Reserved bits CS7E CS6E CS5E CS4E Chip select 7 to 4 enable These bits enable or disable chip select signal output Bit CSCR is initialized to H'0F by a reset and in hardware standby mode. It is not initialized in software standby mode. Bits 7 to 4—Chip Select 7 to 4 Enable (CS7E to CS4E): These bits enable or disable output of the corresponding chip select signal. Bit n CSnE Description 0 Output of chip select signal CSn is disabled (Initial value) 1 Output of chip select signal CSn is enabled Note: n = 7 to 4 Bits 3 to 0—Reserved: These bits cannot be modified and are always read as 1. |
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