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TDA7503 Datasheet(PDF) 14 Page - STMicroelectronics |
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TDA7503 Datasheet(HTML) 14 Page - STMicroelectronics |
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14 / 26 page ![]() GENERAL PURPOSE I/O (GPIO) INTERFACE Timing Characteristics mclk = 20MHz Unit Min. Max. tgod XTI Edge to GPIO Out Valid (GPIO Out Delay Time) -- 26 ns tgoh XTI Edge to GPIO Out Not Valid (GPIO Out Hold Time) 2 -- ns tgis GPIO In Valid to XTI Edge (GPIO In Set-up Time) 10 -- ns tgih XTI Edge to GPIO In Not Valid (GPIO In Hold Time) 6 -- ns Figure 10. GPIO Timing t t ad ds mclk XALE XPSEN OPLOAD Address Data t acc Figure 9. Timing diagram for External Memory Interface For the calculation of slowest access time allowed for a memory attached to the M8051, the following diagram illustrates the timing constraints. Slowest access time allowed, tacc = 4*mclk - tad -tds, where the worst case address delay, tad = 30 ns, and the worst case data setup time, tds = 20 ns. MICRO MEMORY INTERFACE TDA7503 14/26 |
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