AD5100

Rev. 0 | Page 17 of 36

Standard Watchdog Mode

In the default standard watchdog mode, if WDI remains either

pulse is generated in an attempt to allow the system processor to

re-establish the WDI signal. The RESET pulses continue indefi-

nitely until a valid watchdog signal, a rising or falling edge

signal at the WDI, is received. The internal watchdog timer

clears whenever a reset is asserted. The standard WDI and

RESET timing diagrams are shown in

.

Figure 13

Advanced Watchdog Mode

The AD5100 can be programmed into an advanced watchdog

mode. In this mode, if WDI remains either high or low for

as per standard mode. However, if the WDI input remains

inactive after three such RESET pulses, concurrent with the

fourth RESET pulse, SHDN is also asserted. SHDN is released

after 1 second. These actions repeat indefinitely (unless action

is taken by the user), if the processor is not responding. The

advanced WDI and RESET timing diagrams are shown in

.

Figure 14

WDI

RESET PULSE

CONTINUOUS PULSES UNTIL WATCHDOG AWAKES

RESET

Figure 13. Standard Watchdog—Pulsing Reset Until Watchdog Awakes

3 RESET PULSES

1 RESET PULSE

SHUTDOWN AT 4TH RESET PULSE

RELEASE AFTER 1s

WDI

RESET

SHDN

Figure 14. Advanced Watchdog—SHDN Asserted After Three Trials of Resetting the Watchdog (SHDN Released After 1 Second and the Cycle Repeats)