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AD5100 Datasheet(PDF) 21 Page - Analog Devices

Part # AD5100
Description  System Management IC with Programmable Quad Voltage Monitoring and Supervisory Functions
PDF  36 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5100 Datasheet(HTML) 21 Page - Analog Devices

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AD5100
Rev. 0 | Page 21 of 36
POWER REQUIREMENTS
INTERNAL POWER, VREG
The AD5100 internal power, VREG, is derived from V1MON and
becomes active when V2MON reaches 2.2 V. V2MON is used to turn
AD5100 on and off with a different behavior depending on the
V2MON monitoring mode selection.
By default, the AD5100 turns on when the voltage at V2MON rises
above the logic threshold, V2MON_ON. When V2MON falls below the
logic threshold, V2MON_OFF, AD5100 turns off 2 seconds after
SHDN is deasserted. Note that AD5100 requires 5 μs to start up
and that V1MON must be applied before V2MON. Extension of the
AD5100 turn-off allows the system to complete any housekeeping
tasks before the system is powered off.
shows the
default V2MON and VREG waveforms.
Figure 19
Rising Edge Triggered Wake-Up Mode
If rising edge triggered wake-up V2MON mode is selected instead,
the AD5100 does not turn off when V2MON returns to a logic low.
To configure the part into rising edge triggered mode, set the
V2MON off threshold register, Register 0x04[3:1], to 1001.
In this mode, once the part is powered on, it can only be powered
down by an I2C power-down instruction or by removing the
supply on the V1MON pin. To power down the part over the I2C
bus while in rising edge triggered mode, the user must first
ensure that the software power down feature is enabled.
•
Register 0x18[3] = 0: enable software power-down feature
•
Register 0x18[3] =1: disable software power-down feature
The user must then write to Register 0x17[0], to actually power
down the AD5100.
•
Register 0x17[0] = 0: AD5100 not in software power-down
•
Register 0x17[0] = 1: power down AD5100
This feature is for applications that use a wake-up signal.
VOTP
A 5.5 V supply voltage is needed only during OTP fuse program-
ming. This voltage should be provided by an external source
during factory programming and should have 5.5 V/100 mA
driving capability. The OTP programming takes a maximum of
12 ms for each register. VOTP is not required for normal operation.
The VOTP has dual functions; it is used for programming the non-
volatile memory fuse arrays, as well as serving as a compensation
network for internal power stability. As a result, a bypass capacitor
must be connected at the VOTP pin at all times. A low ESR 10 μF
tantalum capacitor is recommended.
AD5100 achieves the OTP function through blowing internal
fuses. Users should always apply the 5.5 V one-time programmable
voltage at the first fuse programming attempt. Failure to comply
with this requirement may lead to a change in the fuse struc-
tures, rendering programming inoperable.
Poor PCB layout introduces parasitic inductance that may affect
the fuse programming voltage. Therefore, it is mandatory that a
10 μF tantalum capacitor be placed as close as possible to the
VOTP pin. The value and the type of C2 are important. It should
provide both a fast response and large supply current handling
with minimum supply droop during programming (see Figure 18).
6V TO 30V
3V TO 30V
APPLY ONLY 5.5V FOR OTP
V1MON
V2MON
VOTP
AD5100
C2
10µF
Figure 18. Power Supply Requirement
V2MON
V2MON_ON*
V2MON,IH
t2SD_HOLD*
t2SD_HOLD*
tVREG_OFF_DELAY
tVREG_OFF_DELAY
tGLITCH
t2SD_DELAY*
t2SD_DELAY*
V2MON_ON*
V2MON_OFF*
V2MON_OFF*
tVREG_ON_DELAY
SHDN
VREG
NOTES
1. 6V < V1MON < 30V
2. * = PROGRAMMABLE
t2SD_DELAY*
Figure 19. Internal Power VREG vs. V2MON Timing Diagrams (Default)



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