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ADS5482 Datasheet(PDF) 9 Page - Texas Instruments

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Part # ADS5482
Description  16-Bit, 80/105/135-MSPS Analog-to-Digital Converters
PDF  42 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

ADS5482 Datasheet(HTML) 9 Page - Texas Instruments

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ADS5481
ADS5482
ADS5483
www.ti.com................................................................................................................................................... SLAS565A – JUNE 2008 – REVISED NOVEMBER 2008
Table 1. TERMINAL FUNCTIONS
TERMINAL
DESCRIPTION
NAME
NO.
1, 2, 8, 14, 18,
AVDD5
5V analog supply
24, 27, 30
9, 15, 19, 25,
AVDD3
3.3V analog supply
28, 31
3, 7, 10, 13, 17,
AGND
20, 23, 26, 29,
Analog ground
32
DVDD3
42, 52, 63
3.3V digital supply
DGND
41, 51, 64
Digital ground
NC
5, 6, 37-40
No connects - leave floating
INP, INM
11, 12
Differential analog inputs (P = plus = true, M = minus = complement)
CLKM, CLKP
21, 22
Differential clock inputs (P = plus = true, M = minus = complement)
Reference voltage input/output (1.2V nominal). To use an external reference and to turn the internal
REF
4
reference off, pull both PDWNF and PDWNS to logic high (DVDD3).
Analog input common mode, output (3.1V), for use in applications that require use of the internally
VCM
16
generated common-mode. See the applications section for more information on using VCM.
External bias resistor for LVDS bias current, normally 10k
Ω to GND to provide nominal 3.5mA LVDS
LVDSB
33
current
Light sleep power down, fast wakeup, logic high (DVDD3) = light sleep enabled (bandgap reference
PDWNF
35
remains on)
Deep sleep power down, slow wakeup, logic high (DVDD3) = deep sleep enabled (bandgap reference is
PDWNS
34
off)
DITHER
36
Dither enable, logic high (DVDD3) = dither enabled
DRY_P,
54, 53
Dataready signal (LVDS clockout) (P = plus = true, M = minus = complement)
DRY_M
D14_15_P,
62, 61
DDR LVDS output bits 14 then 15 (15 is MSB) (P = plus = true, M = minus = complement)
D14_15_M
DE_O_P,
43-50, 55-62
DDR LVDS output bits E (even) then O (odd) (P = plus = true, M = minus = complement)
DE_O_M
D0_1_P,
44, 43
DDR LVDS output bits 0 then 1 (0 is LSB) (P = plus = true, M = minus = complement)
D0_1_M
PowerPAD
65
Analog ground (exposed pad on bottom of package)
Copyright © 2008, Texas Instruments Incorporated
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