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DS80C320 Datasheet(PDF) 27 Page - Maxim Integrated Products |
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DS80C320 Datasheet(HTML) 27 Page - Maxim Integrated Products |
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27 / 40 page ![]() DS80C320/DS80C323 High-Speed/Low-Power Microcontrollers 27 of 40 AC ELECTRICAL CHARACTERISTICS—DS80C323 18 MHz VARIABLE CLOCK PARAMETER SYMBOL MIN MAX MIN MAX UNITS External Oscillator 0 18 0 18 Oscillator Frequency External Crystal 1/tCLCL 1 18 1 18 MHz ALE Pulse Width tLHLL 68 1.5tCLCL-15 ns Port 0 Address Valid to ALE Low tAVLL 16 0.5tCLCL-11 ns Address Hold After ALE Low tLLAX1 6 (Note 5) 0.25tCLCL-8 (Note 5) ns Address Hold After ALE Low for MOVX WR tLLAX2 14 0.5tCLCL-13 ns ALE Low to Valid Instruction In tLLIV 93 2.5tCLCL-46 ns ALE Low to PSEN Low tLLPL 4 0.25tCLCL-10 ns PSEN Pulse Width tPLPH 118 2.25tCLCL-7 ns PSEN Low to Valid Instruction In tPLIV 87 2.25tCLCL-38 ns Input Instruction Hold After PSEN tPXIX 0 0 ns Input Instruction Float After PSEN tPXIZ 51 tCLCL-5 ns Port 0 Address to Valid Instruction In tAVIV1 128 3tCLCL-39 ns Port 2 Address to Valid Instruction In tAVIV2 139 3.5tCLCL-56 ns PSEN Low to Address Float tPLAZ (Note 5) (Note 5) ns NOTES FOR DS80C323 AC ELECTRICAL CHARACTERISTICS All parameters apply to both commercial and industrial temperature operation unless otherwise noted. Specifications to -40°C are guaranteed by design and are not production tested. AC electrical characteristics assume 50% duty cycle for the oscillator, oscillator frequency > 16MHz, and are not 100% production tested, but are guaranteed by design. 1. All signals rated over operating temperature at 18MHz. 2. All signals characterized with load capacitance of 80pF except Port 0, ALE, PSEN , RD , and WR at 100pF. Note that loading should be approximately equal for valid timing. 3. Interfacing to memory devices with float times (turn off times) over 35ns may cause contention. This will not damage the parts, but will cause an increase in operating current. 4. Specifications assume a 50% duty cycle for the oscillator. Port 2 timing will change with the duty cycle variations. 5. Address is held in a weak latch until over-driven by external memory. |
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