AT90USB646 datasheet(456/459 Pages) ATMEL

456 / 459 page

456

7593H–AVR–11/08

ATmega32U6/AT90USB64/128

Analog Comparator .............................................................................. 310

24.1 Analog Comparator Multiplexed Input ...............................................................312

Analog to Digital Converter - ADC ...................................................... 313

25.1 Features ............................................................................................................313

25.2 Operation ...........................................................................................................314

25.3 Starting a Conversion ........................................................................................315

25.4 Prescaling and Conversion Timing ....................................................................316

25.5 Changing Channel or Reference Selection .......................................................319

25.6 ADC Noise Canceler .........................................................................................320

25.7 ADC Conversion Result .....................................................................................324

25.8 ADC Register Description ..................................................................................326

JTAG Interface and On-chip Debug System ...................................... 332

26.1 Overview ............................................................................................................332

26.2 Test Access Port – TAP ....................................................................................332

26.3 TAP Controller ...................................................................................................334

26.4 Using the Boundary-scan Chain ........................................................................335

26.5 Using the On-chip Debug System .....................................................................335

26.6 On-chip Debug Specific JTAG Instructions .......................................................336

26.7 On-chip Debug Related Register in I/O Memory ...............................................337

26.8 Using the JTAG Programming Capabilities .......................................................337

26.9 Bibliography .......................................................................................................337

IEEE 1149.1 (JTAG) Boundary-scan ................................................... 338

27.1 Features ............................................................................................................338

27.2 System Overview ...............................................................................................338

27.3 Data Registers ...................................................................................................338

27.4 Boundary-scan Specific JTAG Instructions .......................................................340

27.5 Boundary-scan Related Register in I/O Memory ...............................................341

27.6 Boundary-scan Chain ........................................................................................342

27.7 ATmega32U6/AT90USB64/128 Boundary-scan Order .....................................345

27.8 Boundary-scan Description Language Files ......................................................348

Boot Loader Support – Read-While-Write Self-Programming ......... 349

28.1 Boot Loader Features ........................................................................................349

28.2 Application and Boot Loader Flash Sections .....................................................349

28.3 Read-While-Write and No Read-While-Write Flash Sections ............................349

28.4 Boot Loader Lock Bits .......................................................................................352

AT90USB646 Datasheet(PDF) 456 Page - ATMEL Corporation