LT3750 datasheet(7/16 Pages) LINER

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LT3750

3750fa

OPERATIO

a rate (VTRANS – VDS(ON))/LPRI. The input voltage is mir-

rored on the secondary winding –N • (VTRANS – VDS(ON))

which reverse biases the diode and prevents current flow

in the secondary winding. Thus, energy is stored in the

core of the transformer.

3. Secondary Energy Transfer

When current limit is reached, the current limit compara-

tor resets the NMOS on-latch and the device enters the

third phase of operation, secondary energy transfer. The

energy stored in the transformer core forward biases the

diode and current flows into the output capacitor. During

this time, the output voltage (neglecting the diode drop) is

reflected back to the primary coil. If the target output

voltage is reached, the VOUT comparator resets the master

latch and the DONE pin goes low. Otherwise, the device

enters the next phase of operation.

4. Discontinuous Mode Detection

Once all the current is transferred to the output capacitor,

(VOUT + VDIODE)/N will appear across the primary winding.

A transformer with no energy cannot support a DC voltage,

so, the voltage across the primary will decay to zero. In

other words, the drain of the NMOS will ring down from

VTRANS + (VOUT + VDIODE)/N to VTRANS. When the drain

voltage falls to VTRANS + 36mV, the DCM comparator sets

the NMOS on-latch and a new charge cycle begins. Steps

2-4 continue until the target output voltage is reached.

LT3750 Datasheet(PDF) 7 Page - Linear Technology