LTC1760CFW datasheet(35/44 Pages) LINER

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LTC1760

1760f

CA1. Remember the maximum ∆IL occurs at the maxi-

mum input voltage. In practice 10µH is the lowest value

recommended for use.

Charger Switching Power MOSFET and Diode

Selection

Two external power MOSFETs must be selected for use

with the LTC1760 charger: An N-channel MOSFET for the

top (main) switch and an N-channel MOSFET for the

bottom (synchronous) switch.

The peak-to-peak gate drive levels are set by the VCC

voltage. This voltage is typically 5.2V. Consequently, logic-

level threshold MOSFETs must be used. Pay close atten-

tion to the BVDSS specification for the MOSFETs as well;

many of the logic level MOSFETs are limited to 30V or less.

Selection criteria for the power MOSFETs include the “ON”

resistance RDS(ON), reverse transfer capacitance CRSS,

input voltage and maximum output current. The LTC1760

charger is always operating in continuous mode so the

duty cycles for the top and bottom MOSFETs are given by:

Main Switch Duty Cycle = VOUT/VIN

Synchronous Switch Duty Cycle = (VIN – VOUT)/VIN

The MOSFET power dissipations at maximum output

current are given by:

PMAIN = VOUT/VIN(IMAX)2(1 + δ∆Τ)RDS(ON) + k(VIN)2

(IMAX)(CRSS)(f)

PSYNC = (VIN – VOUT)/VIN(IMAX)2(1 + δ∆Τ) RDS(ON)

Where δ∆Τ is the temperature dependency of RDS(ON) and

k is a constant inversely related to the gate drive current.

Both MOSFETs have I2R losses while the topside

N-channel equation includes an additional term for transi-

tion losses, which are highest at high input voltages. For

VIN < 20V the high current efficiency generally improves

with larger MOSFETs, while for VIN > 20V the transition

losses rapidly increase to the point that the use of a higher

RDS(ON) device with lower CRSS actually provides higher

efficiency. The synchronous MOSFET losses are greatest

at high input voltage or during a short-circuit when

the duty cycle in this switch is nearly 100%. The term

(1 + δ∆Τ) is generally given for a MOSFET in the form of a

APPLICATIO S I FOR ATIO

normalized RDS(ON) vsTemperaturecurve,butδ =0.005/°C

can be used as an approximation for low voltage MOSFETs.

CRSS is usually specified in the MOSFET characteristics.

The constant k = 1.7 can be used to estimate the contribu-

tions of the two terms in the main switch dissipation

equation.

If the LTC1760 charger is to operate in low dropout mode

or with a high duty cycle greater than 85%, then the

topside N-channel efficiency generally improves with a

larger MOSFET. Using asymmetrical MOSFETs may achieve

cost savings or efficiency gains.

The Schottky diode D1, shown in the Typical Application,

conducts during the dead-time between the conduction of

the two power MOSFETs. This prevents the body diode of

the bottom MOSFET from turning on and storing charge

during the dead-time, which could cost as much as 1% in

efficiency. A 1A Schottky is generally a good size for 4A

regulators due to the relatively small average current.

Larger diodes can result in additional transition losses due

to their larger junction capacitance. The diode may be

omitted if the efficiency loss can be tolerated.

Calculating IC Operating Current

This section shows how to use the values supplied in the

Electrical Characteristics table to estimate operating cur-

rent for a given application.

The total IC operating current through DCIN when AC is

present and batteries are charging (IDCIN_CHG) is given by:

IDCIN_CHG = ICH1 + IVCC2_AC1 + ISAFETY1 + ISAFETY2 +

IVLIM + IILIM + ISMB + ISMB_BAT1 + ISMB_BAT2 + ISMBALERT

where:

ICH1 is defined in “Electrical Characteristics.”

IVCC2_AC1 is defined in “Electrical Characteristics.”

ISAFETYXisthecurrentusedtotestthebattery thermistor

connected to SAFETY1 OR SAFETY2.

For thermistors that are OVER-RANGE:

ISAFETYX = 2/64 • VVCC2/(RXB + RTHX)

For thermistors that are COLD-RANGE:

ISAFETYX = 4/64 • VVCC2/(RXB + RTHX)

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