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TMP320C40 Datasheet(PDF) 39 Page - Texas Instruments |
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TMP320C40 Datasheet(HTML) 39 Page - Texas Instruments |
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39 / 62 page ![]() SMJ320C40, TMP320C40 DIGITAL SIGNAL PROCESSORS SGUS017H – OCTOBER 1993 – REVISED OCTOBER 2001 39 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 (L)DE, (L)AE, and (L)CEx enable timings (see Figure 12) NO. 320C40-40 320C40-50 320C40-60 UNIT NO. MIN* MAX MIN* MAX UNIT 1 td(DEH-DZ) Delay time, (L)DE high to (L)D0–(L)D31 in the high-impedance state 0 15* 0 15* ns 2 td(DEL-DV) Delay time, (L)DE low to (L)D0–(L)D31 valid 0 22 0 16 ns 3 td(AEH-AZ) Delay time, (L)AE high to (L)A0–(L)A30 in the high-impedance state 0 15* 0 15* ns 4 td(AEL-AV) Delay time, (L)AE low to (L)A0–(L)A30 valid 0 21 0 16 ns 5 td(CEH-RWZ) Delay time, (L)CEx high to (L)R/W0, (L)R/W1 in the high-impedance state 0 15* 0 15* ns 6 td(CEL-RWV) Delay time, (L)CEx low to (L)R/W0, (L)R/W1 valid 0 21 0 16 ns 7 td(CEH-SZ) Delay time, (L)CEx high to (L)STRB0, (L)STRB1 in the high-impedance state 0 15* 0 15* ns 8 td(CEL-SV) Delay time, (L)CEx low to (L)STRB0, (L)STRB1 valid 0 21 0 16 ns 9 td(CEH-PAGEZ) Delay time, (L)CEx high to (L)PAGE0, (L)PAGE1 in the high-impedance state 0 15* 0 15* ns 10 td(CEL-PAGEV) Delay time, (L)CEx low to (L)PAGE0, (L)PAGE1 valid 0 21 0 16 ns * On products compliant to MIL-PRF-38535, this parameter is not production tested. (L)DE (L)D31–(L)D0 (L)AE (L)A30–(L)A0 (L)CE0, (L)CE1 (L)R/W0, (L)R/W1 (L)STRB0, (L)STRB1 (L)PAGE0, (L)PAGE1 1 2 3 4 Hi-Z 5 6 Hi-Z 7 8 Hi-Z 9 10 Hi-Z Hi-Z Figure 12. (L)DE, (L)AE, and (L)CEx Enable Timings |
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