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TMS320VC5420 Datasheet(PDF) 52 Page - Texas Instruments

Part # TMS320VC5420
Description  FIXED-POINT DIGITAL SIGNAL PROCESSOR
PDF  77 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320VC5420 Datasheet(HTML) 52 Page - Texas Instruments

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TMS320VC5420
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS080C – MARCH 1999 – REVISED APRIL 2000
52
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251–1443
ready timing for externally generated wait states
timing requirements for externally generated wait states [H = 0.5 tc(CO)]† (see Figure 19 and
Figure 20)
MIN
MAX
UNIT
tsu(RDY)
Setup time, READY before CLKOUT low
7
ns
th(RDY)
Hold time, READY after CLKOUT low
0
ns
tv(RDY)IOSTRB
Valid time, READY after IOSTRB low‡
5H–8
ns
th(RDY)IOSTRB
Hold time, READY after IOSTRB low‡
5H
ns
† The hardware wait states can be used only in conjunction with the software wait states to extend the bus cycles. To generate wait states using
READY, at least two software wait states must be programmed.
‡ These timings are included for reference only. The critical timings for READY are those referenced to CLKOUT.
tsu(RDY)
IOSTRB
READY
PPA[17:0]
CLKOUT
th(RDY)
Wait State Generated
by READY
Wait
States
Generated
Internally
tv(RDY)IOSTRB
th(RDY)IOSTRB
Figure 19. I/O Port Read With Externally Generated Wait States



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