TMS370Cx1x

8-BIT MICROCONTROLLER

SPNS012F – MAY 1987 – REVISED FEBRUARY 1997

4

POST OFFICE BOX 1443

description (continued)

Table 1 provides a memory configuration overview of the TMS370Cx1x devices.

Table 1. Memory Configurations

DEVICE

PROGRAM MEMORY

(BYTES)

DATA MEMORY

(BYTES)

28 PIN PACKAGES

ROM

EPROM

RAM

EEPROM

TMS370C010A

4K

—

128

256

FN – PLCC

N – PDIP

TMS370C012A

8K

—

256

256

FN – PLCC

N – PDIP

TMS370C311A

2K

—

128

–

FN – PLCC

N – PDIP

TMS370C310A

4K

—

128

–

FN – PLCC

N – PDIP

TMS370C312A

8K

—

128

–

FN – PLCC

N – PDIP

TMS370C712A,

TMS370C712B

—

8K

256

256

FN – PLCC

N –PDIP

SE370C712A†,

SE370C712B†

—

8K

256

256

FZ – CLCC

JD – CDIP

† System evaluators and development are for use only in prototype environment and their reliability has not been characterized.

The suffix letter (A or B) appended to the device names shown in the device column of Tables 1 and 2 indicates

the configuration of the device. ROM or EPROM devices have different configurations as indicated in Table 2.

ROM devices with the suffix letter A are configured through a programmable contact during manufacture.

Table 2. Suffix Letter Configuration

DEVICE ‡

WATCHDOG TIMER

CLOCK

LOW-POWER MODE

EPROM A

Standard

Divide-by-4 (Standard oscillator)

Enabled

EPROM B

Hard

Divide-by-1 (PLL)

Enabled

Standard

ROM A

Hard

Divide-by-4 or Divide-by-1 (PLL)

Enabled or disabled

Simple

‡ Refer to the “device numbering conventions” section for device nomenclature and to the “device part numbers” section for ordering.

The 2K bytes, 4K bytes, and 8K bytes of mask-programmable ROM in the associated TMS370Cx1x devices

are replaced in the TMS370C712 with 8K bytes of EPROM. All other available memory and on-chip peripherals

are identical, with the exception of no data EEPROM on the TMS370C311, TMS370C310, and TMS370C312

devices. The OTP (TMS370C712) device and reprogrammable (SE370C712) device are available.

TMS370C712 OTP devices are available in plastic packages. This microcontroller is effective to use for

immediate production updates for other members of the TMS370Cx1x family or for low volume production runs

when the mask charge or cycle time for the low-cost mask ROM devices is not practical.

The SE370C712 has a windowed ceramic package to allow reprogramming of the program EPROM memory

during the development / prototyping phase of design. The SE370C712 devices allow quick updates to

breadboards and prototype systems while iterating initial designs.