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TAS5630 Datasheet(PDF) 4 Page - Texas Instruments

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Part # TAS5630
Description  300W STEREO / 600W MONO PurePath??HD ANALOG-INPUT POWER STAGE
PDF  31 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TAS5630 Datasheet(HTML) 4 Page - Texas Instruments

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ABSOLUTE MAXIMUM RATINGS
RECOMMENDED OPERATING CONDITIONS
TAS5630
SLES220 – JUNE 2009 ...................................................................................................................................................................................................... www.ti.com
over operating free-air temperature range unless otherwise noted
(1)
VALUE
UNIT
VDD to AGND
–0.3 to 13.2
V
GVDD to AGND
–0.3 to 13.2
V
PVDD_X to GND_X(2)
–0.3 to 69
V
OUT_X to GND_X(2)
–0.3 to 69
V
BST_X to GND_X(2)
–0.3 to 82.2
V
BST_X to GVDD_X(2)
–0.3 to 69
V
VREG to AGND
–0.3 to 4.2
V
GND_X to GND
–0.3 to 0.3
V
GND_X to AGND
–0.3 to 0.3
V
OC_ADJ, M1, M2, M3, OSC_IO+, OSC_IO-, FREQ_ADJ, VI_CM, C_STARTUP, PSU_REF
–0.3 to 4.2
V
to AGND
INPUT_X
–0.3 to 5
V
RESET, SD, OTW1, OTW2, CLIP, READY to AGND
–0.3 to 7
V
Continuous sink current (SD, OTW1, OTW2, CLIP, READY)
9
mA
Operating junction temperature range, TJ
0 to 150
°C
Storage temperature, Tstg
–40 to 150
°C
Human body model(3) (all pins)
±2
kV
Electrostatic discharge
Charged device model(3) (all pins)
±500
V
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
These voltages represents the DC voltage + peak AC waveform measured at the terminal of the device in all conditions.
(3)
Failure to follow good anti-static ESD handling during manufacture and rework will contribute to device malfunction. Please ensure
operators handling the device are adequately grounded through the use of ground straps or alternative ESD protection.
over operating free-air temperature range (unless otherwise noted)
MIN NOM
MAX
UNIT
PVDD_x
Half-bridge supply
DC supply voltage
25
50
52.5
V
Supply for logic regulators and gate-drive
GVDD_x
DC supply voltage
10.8
12
13.2
V
circuitry
VDD
Digital regulator supply voltage
DC supply voltage
10.8
12
13.2
V
RL(BTL)
3.5
4
Output filter according to schematics in
RL(SE)
Load impedance
1.8
2
Ω
the application information section
RL(PBTL)
1.6
2
LOUTPUT(BTL)
7
10
LOUTPUT(SE)
Output filter inductance
Minimum output inductance at IOC
7
15
µH
LOUTPUT(PBTL)
7
10
Nominal
350
400
450
PWM frame rate selectable for AM
FPWM
interference avoidance; 1% Resistor
AM1
310
340
350
kHz
tolerance.
AM2
250
300
320
Nominal; Master mode
9.5
10
10.5
RFREQ_ADJ
PWM frame rate programming resistor
AM1; Master mode
19.8
20
20.2
k
Ω
AM2; Master mode
29.7
30
30.3
Voltage on FREQ_ADJ pin for slave mode
VFREQ_ADJ
Slave mode
3.3
V
operation
TJ
Junction temperature
0
150
°C
4
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Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TAS5630



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