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TAS5630 Datasheet(PDF) 11 Page - Texas Instruments |
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TAS5630 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 31 page ![]() TAS5630 www.ti.com ...................................................................................................................................................................................................... SLES220 – JUNE 2009 ELECTRICAL CHARACTERISTICS (continued) PVDD_X = 50 V, GVDD_X = 12 V, VDD = 12 V, TC (Case temperature) = 75°C, fS = 400 kHz, unless otherwise specified. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT I/O PROTECTION Undervoltage protection limit, GVDD_x and Vuvp,G 9.5 V VDD Vuvp,hyst (1) 0.6 V OTW1(1) Overtemperature warning 1 95 100 105 °C OTW2(1) Overtemperature warning 2 115 125 135 °C Temperature drop needed below OTW OTWhyst (1) temperature for OTW to be inactive after 25 °C OTW event. Overtemperature error 145 155 165 °C OTE(1) OTE-OTW differential 30 °C A reset needs to occur for SD to be released OTEhyst (1) 25 °C following an OTE event OLPC Overload protection counter fPWM = 400 kHz 1.3 ms Resistor – programmable, nominal peak current in 1 Ω load, 19 A 64 Pin QFP package (PHD) ROCP = 22 kΩ Overcurrent limit protection Resistor – programmable, nominal peak IOC current in 1 Ω load, 19 A 44 Pin PSOP3 package (DKD), ROCP = 24 kΩ Resistor – programmable, nominal peak current in 1 Ω load, Overcurrent limit protection, Latched 19 A ROCP = 47 kΩ Time from switching transition to flip-state IOCT Overcurrent response time 150 ns induced by overcurrent Connected when RESET is active to Internal pulldown resistor at output of each IPD provide bootstrap charge. Not used in SE 3 mA half bridge mode. STATIC DIGITAL SPECIFICATIONS VIH High level input voltage 2 V INPUT_X, M1, M2, M3, RESET VIL Low level input voltage 0.8 V Ilkg Input leakage current 100 µA OTW/SHUTDOWN (SD) Internal pullup resistance, OTW1 to VREG, RINT_PU 20 26 32 k Ω OTW2 to VREG, SD to VREG Internal pullup resistor 3 3.3 3.6 VOH High level output voltage V External pullup of 4.7 k Ω to 5 V 4.5 5 VOL Low level output voltage IO = 4 mA 200 500 mV Device fanout OTW1, OTW2, SD, CLIP, FANOUT No external pullup 30 devices READY (1) Specified by design. Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): TAS5630 |
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