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TPS23754PWPR Datasheet(PDF) 7 Page - Texas Instruments |
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TPS23754PWPR Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 41 page ![]() PAD=V SS N/C=LeavePinUnused TPS23754-1 1 2 3 4 5 6 7 15 14 13 11 12 8 16 V DD DEN DT FRS CLS GATE RTN V C CS V SS V B CTL T2P BLNK GAT2 10 9 19 18 17 20 PAD=V SS APD ARTN COM TPS23754/6 PPD V DD1 1 2 3 4 5 6 7 15 14 13 11 12 8 16 V DD DEN DT FRS CLS GATE RTN V C CS V SS V B CTL T2P BLNK GAT2 10 9 19 18 17 20 APD ARTN COM N/C V DD1 TPS23754 TPS23754-1 TPS23756 www.ti.com ....................................................................................................................................................... SLVS885B – OCTOBER 2008 – REVISED MAY 2009 (TOP VIEW) PIN FUNCTIONS NO. NAME TYPE DESCRIPTION '754/6 ‘754-1 CTL 1 1 I The control loop input to the PWM (pulse width modulator), typically driven by output regulation feedback (e.g. optocoupler). Use VB as a pullup for CTL. VB 2 2 O 5.1 V bias rail for dc/dc control circuits and the feedback optocoupler. Typically bypass with a 0.1 µF to ARTN. CS 3 3 I/O DC/DC converter switching MOSFET current sense input. See RCS in Figure 1. COM 4 4 Gate driver return, connect to ARTN and RTN. GATE 5 5 O Gate drive output for the main dc/dc converter switching MOSFET. VC 6 6 I/O DC/DC converter bias voltage. Connect a 0.47 µF (minimum) ceramic capacitor to ARTN at the pin, and a larger capacitor to power startup. GAT2 7 7 O Gate drive output for a second dc/dc converter switching MOSFET (see Figure 1). ARTN 8 8 ARTN is the dc/dc converter analog return. Tie to RTN and COM on the circuit board. RTN 9 9 RTN is the output of the PoE hotswap MOSFET. VSS 10 10 Connect to the negative power rail derived from the PoE source. VDD1 11 11 I Source of dc/dc converter startup current. Connect to VDD for many applications. VDD 12 12 I Connect to the positive PoE input power rail. VDD powers the PoE interface circuits. Bypass with a 0.1 µF capacitor and protect with a TVS. DEN 13 13 I/O Connect a 24.9 k Ω resistor from DEN to VDD to provide the PoE detection signature. Pulling this pin to VSS during powered operation causes the internal hotswap MOSFET to turn off. NC – 14 Float this no-connect pin. PPD 14 – I Raising VPPD-VSS above 1.55 V enables the hotswap MOSFET and activates T2P. Connecting PPD to VDD enables classification when APD is active. Tie PPD to VSS or float when not used. CLS 15 15 I Connect a resistor from CLS to VSS to program classification current. 2.5 V is applied to the program resistor during classification to set class current. DT 16 16 I Connect a resistor from DT to ARTN to set the GATE to GAT2 dead time. Tie DT to VB to disable GAT2 operation. APD 17 17 I Raising VAPD-VARTN above 1.5 V disables the internal hotswap switch, turns class off, and forces T2P active. This forces power to come from a external VDD1-RTN adapter. Tie APD to ARTN when not used. BLNK 18 18 I Connect to ARTN to utilize the internally set current-sense blanking period, or connect a resistor from BLNK to ARTN to program a more accurate period. FRS 19 19 I Connect a resistor from FRS to ARTN to program the converter switching frequency. FRS may be used to synchronize the converter to an external timing source. T2P 20 20 O Active low output that indicates a PSE has performed the IEEE 802.3at type 2 hardware classification, PPD is active, or APD is active. Pad – – Connect to VSS. Copyright © 2008–2009, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): TPS23754 TPS23754-1 TPS23756 |
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