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TPS65192 Datasheet(PDF) 10 Page - Texas Instruments |
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TPS65192 Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 25 page ![]() 0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 0 10 20 30 40 50 60 70 80 90 100 CHANNELS8-9 CHANNELS1-7 2 1.75 1.5 1.25 1 0.75 0.5 0.25 0 OutputCurrent mA – 0 10 20 30 40 50 60 70 80 90 100 DETAILED DESCRIPTION LEVEL SHIFTERS Q1 Q2 Channel Control VGH1 OUTx ToLCDPanel RE VGL Q3 RE INx FLKx FromTiming Controller TPS65192 SLVS962 – JULY 2009 ....................................................................................................................................................................................................... www.ti.com OUTPUT VOLTAGE DROP (LOW) vs OUTPUT CURRENT Figure 17. The 9 level shifter channels in the TPS65192 are divided into two groups. Channels 1 through 7 are powered from VGH1 and VGL, channels 8 and 9 are powered from VGH2 and VGL. Channels 1 to 6 support gate shaping and channels 7 through 9 do not (see the block diagram on page 1). Figure 18 contains a simplified block diagram of one channel with gate voltage shaping. Figure 18. Level Shifter Channel With Gate Voltage Shaping On the rising edge of IN, Q1 turns on, Q2 and Q3 turn off, and OUT is driven to VGH1. On the falling edge of FLK, Q1 turns off, Q3 is turned on, and the panel now discharges through Q3 and RE (see Figure 19). On the falling edge of IN, Q2 turns on and Q3 turns off, and OUT is driven to VGL. This sequence is repeated in turn for each channel. 10 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPS65192 |
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