TMC1175A datasheet(6/18 Pages) CADEKA

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TMC1175A

PRODUCT SPECIFICATION

REV. 1.3.3 2/28/02

This is the primary reason that the signal to noise ratio drops

off as full scale frequency increases. Note, also, that the slew

rate is directly proportional to signal amplitude, A. A/Ds will

handle lower-amplitude signals of higher bandwidth.

All this is of particular interest in applications such as digi-

tizing analog VGA RGB signals, or the output of a CCD

imaging chip. These data are effectively pre-sampled: there

is a period of rapid slewing from one pixel value to another,

followed by a relatively stable dc level before the signal

slews to the next pixel value. The goal is, of course, to

sample on these pixel values, not on the slewing between

pixels. During the aperture time, the A/D sees essentially a

dc signal, and classic bandwidth considerations are not

important. As long as the input circuit can slew and settle to

the new value in the prescribed period, an accurate conver-

sion will be made.

The TMC1175A is capable of slewing a full 2V and settling

between samples taken as little as 25ns apart, making it ideal

for digitizing analog VGA and CCD outputs.

Equivalent Circuits and Threshold Level

Figure 4. Equivalent Digital Input Circuit

Figure 5. Equivalent Digital Output Circuit

Data or

Control

Input

VDD

27014B

GND

VDD

27011B

GND

Output

Figure 7. Threshold Levels for Three-State Measurements

65-1175A-07

tENA

2.0V

0.8V

tDIS

Three-State

Outputs

High Impedance

0.5V

Figure 6. Equivalent Analog Input Circuit

VDDA

AGND

VIN

27052A

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