troller can respond, the output deviates further,

depending on the inductor and output capacitor

values. After a short time (see the

Typical Operating

Characteristics), the controller responds by regulating

the output voltage back to its nominal state. The con-

troller response time depends on the closed-loop

bandwidth. With a higher bandwidth, the response time

is faster, thus preventing the output from deviating fur-

ther from its regulating value.

Compensation Design

An internal transconductance error amplifier is used to

compensate the control loop. Connect a series resistor

and capacitor between COMP and GND to form a pole-

zero pair. The external inductor, internal high-side

MOSFET, output capacitor, compensation resistor, and

compensation capacitor determine the loop stability.

The inductor and output capacitor are chosen based

on performance, size, and cost. Additionally, the com-

pensation resistor and capacitor are selected to opti-

mize control-loop stability. The component values

shown in the typical application circuits (Figures 3, 4,

and 5) yield stable operation over a broad range of

input-to-output voltages.

The controller uses a current-mode control scheme that

regulates the output voltage by forcing the required

current through the external inductor. The voltage

across the internal high-side MOSFET’s on-resistance

mode control eliminates the double pole caused by the

inductor and output capacitor, which has large phase

shift that requires more elaborate error-amplifier com-

pensation. A simple Type 1 compensation with single

bandwidth loop.

The basic regulator loop consists of a power modulator,

an output feedback divider, and an error amplifier. The

that define the power modulator:

The pole frequency for the modulator is:

The zero frequency for the output capacitor ESR is:

The pole frequency set by the transconductance ampli-

fier output resistance, and compensation resistor and

capacitor is:

The zero frequency set by the compensation capacitor

and resistor is:

For best stability and response performance, the

closed-loop unity-gain frequency must be much higher

than the modulator pole frequency. In addition, the

closed-loop unity-gain frequency should be approxi-

mately 50kHz. The loop gain equation at unity gain fre-

quency then is:

calculated as:

CV

C

RI

C

OUT

OUT

C

OUT MAX

=×

×

()

R

V

gm

V

G

C

O

EA

FB

MOD fc

=

××

()

GG

V

V

EA fc

MOD fc

FB

O

()

()

××

=1

fz

CR

EA

CC

=

××

1

2

π

fp

CR

EA

C

OEA

=

××

1

2

π

fz

C

ESR

ESR

OUT

=

××

1

2

π

fp

C

R

ESR

MOD

OUT

LOAD

=

××

+

()

1

2

π

G

gmc

R

MOD

LOAD

=×

Dual, 180° Out-of-Phase, 1.4MHz, 750mA Step-

Down Regulator with POR and RSI/PFO

18

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