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ADP1877ACPZ-R7 Datasheet(PDF) 13 Page - Analog Devices

Part # ADP1877ACPZ-R7
Description  Dual Output Synchronous Buck PWM Controller With Tracking
PDF  32 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADP1877ACPZ-R7 Datasheet(HTML) 13 Page - Analog Devices

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ADP1877
Rev. 0 | Page 13 of 32
THEORY OF OPERATION
The ADP1877 is a current mode (using ADI proprietary
FlexMode® architecture), dual-channel, step-down switching
controller with integrated MOSFET drivers that drive N-channel
synchronous power MOSFETs. The two outputs are phase shifted
180°. This reduces the input RMS current, thus minimizing
required input capacitance.
The ADP1877 can be set to operate in pulse skip high efficiency
mode under light load or in forced PWM. The integrated boost
diodes in the ADP1877 reduce the overall system cost and
component count. The ADP1877 includes programmable soft
start, output overvoltage protection, programmable current
limit, power good, and tracking function. The ADP1877 can be
set to operate in any switching frequency between 200 kHz and
1.5 MHz with one external resistor.
CONTROL ARCHITECTURE
The ADP1877 is based on a fixed frequency current mode
PWM control architecture. The inductor current is sensed by
the voltage drop measured across the external low-side MOSFET
RDSON during the off period of the switching cycle (valley inductor
current). The current sense signal is further processed by the
current sense amplifier. The output of the current sense amplifier is
held, and the emulated current ramp is multiplexed and fed into
the PWM comparator as shown in Figure 23. The valley current
information is captured at the end of the off period, and the
emulated current ramp is applied at that point when the next on
cycle begins. An error amplifier integrates the error between the
feedback voltage and the generated the error voltage from the
COMP pin (from error amp in Figure 23).
FF
OSC
Q
Q
S
R
ACS
VCS
VIN
VIN
AR
RRAMP
IRAMP
CR
FROM
ERROR AMP
TO
DRIVERS
FROM
LOW SIDE
MOSFET
Figure 23. Simplified Control Architecture
As shown in Figure 23, the emulated current ramp is generated
inside the IC but offers programmability through the RAMPx
pin. Selecting an appropriate value resistor from VIN to the
RAMP pin programs a desired slope compensation value and, at
the same time, provides a feed forward feature. The benefits
realized by deploying this type of control scheme are that there
is no need to worry about the turn-on current spike corrupting
the current ramp. Also, the current signal is stable because the
current signal is sampled at the end of the turn-off period,
which gives time for the switch node ringing to settle. Other
benefits of using current mode control scheme still apply, such
as simplicity of loop compensation. Control logic enforces
antishoot-through operation to limit cross conduction of the
internal drivers and external MOSFETs.
OSCILLATOR FREQUENCY
The internal oscillator frequency, which ranges from 200 kHz to
1.5 MHz, is set by an external resistor, RFREQ, at the FREQ pin.
Some popular fOSC values are shown in Table 4, and a graphical
relationship is shown in Figure 24. For instance, a 78.7 kΩ
resistor sets the oscillator frequency to 800 kHz. Furthermore,
connecting FREQ to AGND or FREQ to VCCO sets the
oscillator frequency to 300 kHz or 600 kHz, respectively. For
other frequencies that are not listed in Table 4, the values of
RFREQ and fOSC can be obtained from Figure 24, or use the
following empirical formula to calculate these values:
065
.
1
)
(
96568
)
(
×
=
Ω
kHz
f
k
R
OSC
FREQ
Table 4. Setting the Oscillator Frequency
RFREQ
fOSC (Typical)
332 kΩ
200 kHz
78.7 kΩ
800 kHz
60.4 kΩ
1000 kHz
51 kΩ
1200 kHz
40.2 kΩ
1500 kHz
FREQ to AGND
300 kHz
FREQ to VCCO
600 kHz
10
60
110
160
210
260
310
360
410
100
400
700
1000
1300
1600
1900
fOSC (kHz)
RFREQ (kΩ) = 96568 fOSC (kHz)–1.065
Figure 24. RFREQ vs. fOSC



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