ADP1877ACPZ-R7 datasheet(17/32 Pages) AD

17 / 32 page

ADP1877

Rev. 0 | Page 17 of 32

APPLICATIONS INFORMATION

SETTING THE OUTPUT VOLTAGE

The output voltage is set using a resistive voltage divider from

the output to FB. The voltage divider divides down the output

voltage to the 0.6 V FB regulation voltage to set the regulation

output voltage. The output voltage can be set to as low as 0.6 V

and as high as 90% of the power input voltage.

The maximum input bias current into FB is 100 nA. For a 0.15%

degradation in regulation voltage and with 100 nA bias current,

the low-side resistor, RBOT, must be less than 9 kΩ, which results

in 67 μA of divider current. For RBOT, use a 1 kΩ to 20 kΩ resistor.

A larger value resistor can be used but results in a reduction in

output voltage accuracy due to the input bias current at the FB

pin, while lower values cause increased quiescent current

consumption. Choose RTOP to set the output voltage by using

the following equation:

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

−

OUT

BOT

TOP

where:

RTOP is the high-side voltage divider resistance.

RBOT is the low-side voltage divider resistance.

VOUT is the regulated output voltage.

VFB is the feedback regulation threshold, 0.6 V.

The minimum output voltage is dependent on fSW and minimum

DH on time. The maximum output voltage is dependent on fSW,

the minimum DH off time, and the IR drop across the high-side

N-channel MOSFET (NMOSFET) and the DCR of the inductor.

For example, with an fSW of 600 kHz (or 1.67 μs) and minimum on

time of 130 ns, the minimum duty cycle is approximately 7.8%

(130 ns/1.67 μs). If VIN is 12 V and the duty cycle is 7.8%, then

the lowest output is 0.94 V. As an example for the maximum output

voltage, if VIN is 5 V, fSW is 600 kHz, and the minimum DH off

time is 390 ns (330 ns DH off time plus approximately 60 ns

total dead time), then the maximum duty cycle is 76%. Therefore,

the maximum output is approximately 3.8 V. If the IR drop

across the high-side NMOSFET and the DCR of the inductor is

0.5 V, then the absolute maximum output is 4.5 V (5 V − 0.5 V),

independent of fSW and duty cycle.

SOFT START

Program the soft start by connecting a capacitor from SSx to

AGND. The soft start function limits the input inrush current

and prevents the output overshoot.

On startup, a 6.5 μA current source charges the SSx capacitor.

The soft start period is approximated by

The SSx pin reaches a final voltage equal to VCCO. If the output

voltage is precharged prior to turn-on, the ADP1877 prevents

reverse inductor current, which discharges the output capacitor.

Once the voltage at SSx exceeds the regulation voltage (typically

0.6 V), the reverse current is reenabled to allow the output

voltage regulation to be independent of load current.

When a controller is disabled, for instance, EN1/EN2 is pulled

low or experiences an overcurrent limit condition, the soft start

capacitor is discharged through an internal 1 kΩ pull-down

resistor.

SETTING THE CURRENT LIMIT

The current limit comparator measures the voltage across the

low-side MOSFET to determine the load current.

The current limit is set by an external current limit resistor,

RILIM. The current sense pin, ILIMx, sources 50 μA to this external

resistor. This creates an offset voltage of RILIM multiplied by

50 μA. When the drop across the low-side MOSFET, RDSON, is

equal to or greater than this offset voltage, the ADP1877 flags a

current limit event.

Because the ILIMx current and the MOSFET, RDSON, vary over

process and temperature, the minimum current limit should be

set to ensure that the system can handle the maximum desired

load current. To do this, use the peak current in the inductor,

which is the desired output current limit level plus ½ of the

ripple current, the maximum RDSON of the MOSFET at its

highest expected temperature, and the minimum ILIM current.

MAX

DSON

LPK

ILIM

where:

ILPK is the peak inductor current.

The buck converters usually run a fairly high current. PCB

layout and component placement may affect the current limit

setting. An iteration of the RILIM value may be required for a

particular board layout and MOSFET selection. If alternative

MOSFETs are substituted at some point in production, these

resistor values may also need an iteration. Keep in mind that the

temperature coefficient of the MOSFET, RDSON, is typically

0.4%/oC.

ACCURATE CURRENT LIMIT SENSING

RDSON of the MOSFET can vary by more than 50% over the

temperature range. Accurate current limit sensing can be

achieved by adding a current sense resistor from the source of

the low-side MOSFET to PGND. Make sure that the power

rating of the current sense resistor is adequate for the application.

Apply the above equation and calculate RILIM by replacing

RDSON_MAX with RSENSE. The Figure 31 illustrates the

implementation of this accurate current limit sensing.

ADP1877ACPZ-R7 Datasheet(PDF) 17 Page - Analog Devices

ADP1877ACPZ-R7 Datasheet(HTML) 17 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

Datasheet Download

Link URL