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HMC714LP5 Datasheet(PDF) 29 Page - Hittite Microwave Corporation |
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HMC714LP5 Datasheet(HTML) 29 Page - Hittite Microwave Corporation |
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29 / 40 page ![]() For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com 12 12 - 142 Channel isolation/interference is grouped into two categories: On-chip inter-channel interference, and Off-chip inter-channel interference. Off-chip interference between channels should be considered, especially at small signal levels, since HMC714LP5E is capable of detecting a signal over a very wide dynamic range (70 dB+). There are two main mechanisms through which the interference between the channels may affect measurement accuracy. The first one is the direct coupling of the RF signal from one RF channel input to the other RF channel input. Baluns on the detector inputs usually contribute to inter-channel coupling, as does PC board design and the quality of the soldered connections. On-chip inter-channel interference, herein referred to as “input-output channel isolation”, usually manifests itself as drift on one detector output due to a relatively strong signal present at the other detector input. Quantitatively, the input- output channel isolation is defined as the difference between the input power levels at both channels when the interfering (higher power level) channel causes a 1 dB measurement drift in the interfered (lower power level) channel. Worst case channel interference occurs when one channel has an input signal level just over its detection threshold. Input-Output Channel isolation for HMC714LP5E is: 55+ dB input-output isolation at 900 MHz 45 dB input-output isolation up to 2.7 GHz 35 dB input-output isolation up to 5.8 GHz. If the same signal frequency is injected into both channels for this Input-Output Channel Isolation measurement, the interference will manifest as a phase delay. A slight offset in signal frequency between the two channels can be seen as a ripple at the output of the channel with the lower power level applied at its input. Peaks in the output ripple correspond to the worst-case phase shift for input-output interference. The frequency of the output ripple will be equal to the “beat” frequency between the two channels. The magnitude of the output ripple will depend on the integration and offset capacitors connected to CINT and COFS pins, respectively. The output ripple is reduced by increasing the value of the integration capacitance (CINT), thereby decreasing the integrator bandwidth. The data was collected using a 100kHz offset between the channels. 0 0.5 1 1.5 2 2.5 3 -30 -25 -20 -15 -10 -5 0 5 10 15 0.5 GHz 0.9 GHz 1.9 GHz 2.7 GHz 3.9 GHz 5.8 GHz CHANNEL B INPUT POWER (dBm) 0 0.5 1 1.5 2 2.5 3 -30 -25 -20 -15 -10 -5 0 5 10 15 0.5 GHz 0.9 GHz 1.9 GHz 2.7 GHz 3.9 GHz 5.8 GHz CHANNEL A INPUT POWER (dBm) -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 Input A->Input B Input B->Input A FREQUENCY (GHz) Input to Input Isolations with ETC1-1-13 Baluns Interference to an Input Signal (INB Power Fixed) with Interfering Signal on the other Channel (INA Power Swept) [1] Interference to an Input Signal (INA Power Fixed) with Interfering Signal on the other Channel (INB Power Swept) [1] Channel Isolation/Interface HMC714LP5 / 714LP5E v05.0309 DUAL RMS POWER DETECTOR 0.1 - 3.9 GHz |
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