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IMX35 Datasheet(PDF) 117 Page - Freescale Semiconductor, Inc |
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IMX35 Datasheet(HTML) 117 Page - Freescale Semiconductor, Inc |
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117 / 148 page  i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 6 Freescale Semiconductor 117 Table 75. SSI Receiver with Internal Clock Timing Parameters ID Parameter Min. Max. Unit Internal Clock Operation SS1 (Tx/Rx) CK clock period 81.4 — ns SS2 (Tx/Rx) CK clock high period 36.0 — ns SS3 (Tx/Rx) CK clock rise time — 6 ns SS4 (Tx/Rx) CK clock low period 36.0 — ns SS5 (Tx/Rx) CK clock fall time — 6 ns SS7 (Rx) CK high to FS (bl) high — 15.0 ns SS9 (Rx) CK high to FS (bl) low — 15.0 ns SS11 (Rx) CK high to FS (wl) high — 15.0 ns SS13 (Rx) CK high to FS (wl) low — 15.0 ns SS20 SRXD setup time before (Rx) CK low 10.0 — ns SS21 SRXD hold time after (Rx) CK low 0 — ns Oversampling Clock Operation SS47 Oversampling clock period 15.04 — ns SS48 Oversampling clock high period 6 — ns SS49 Oversampling clock rise time — 3 ns SS50 Oversampling clock low period 6 — ns SS51 Oversampling clock fall time — 3 ns |
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