ATmega88 datasheet(237/340 Pages) ATMEL

237 / 340 page

237

7530H–AVR–02/09

ATmega48/88/168 Automotive

21. Analog-to-Digital Converter

21.1

Features

• 10-bit Resolution

• 0.5 LSB Integral Non-linearity

• ± 2 LSB Absolute Accuracy

• 13 - 260 µs Conversion Time

• Up to 15 kSPS at Maximum Resolution

• 6 Multiplexed Single Ended Input Channels

• 2 Additional Multiplexed Single Ended Input Channels (TQFP and QFN Package only)

• Optional Left Adjustment for ADC Result Readout

• 0 - V

CC ADC Input Voltage Range

• Selectable 1.1V ADC Reference Voltage

• Free Running or Single Conversion Mode

• Interrupt on ADC Conversion Complete

• Sleep Mode Noise Canceler

The ATmega48/88/168 features a 10-bit successive approximation ADC. The ADC is connected

to an 8-channel Analog Multiplexer which allows eight single-ended voltage inputs constructed

from the pins of Port A. The single-ended voltage inputs refer to 0V (GND).

The ADC contains a Sample and Hold circuit which ensures that the input voltage to the ADC is

held at a constant level during conversion. A block diagram of the ADC is shown in Figure 21-1.

The ADC has a separate analog supply voltage pin, AV

CC. AVCC must not differ more than ±

0.3V from V

CC. See the paragraph “ADC Noise Canceler” on page 244 on how to connect this

pin.

Internal reference voltages of nominally 1.1V or AV

CC are provided On-chip. The voltage refer-

ence may be externally decoupled at the AREF pin by a capacitor for better noise performance.

The Power Reduction ADC bit, PRADC, in “Power Reduction Register - PRR” on page 39 must

be disabled by writing a logical zero to enable the ADC.

ATmega88 Datasheet(PDF) 237 Page - ATMEL Corporation