14

9128D–RKE–01/09

ATA5749 [Preliminary]

Figure 6-3 shows the combination with slow programming and a faster ramp up of XTO. A dia-

gram of the operating modes is shown in Figure 6-5 and a description of which circuit blocks are

active is provided in Table 6-3 on page 15. This also contains the information needed for the cal-

culation of consumed charge for one operation cycle.

Figure 6-3.

Timing Diagram if Programming is Slower than T

XTO

6.3

Reprogramming without Stopping the Crystal Oscillator

After the configuration register is programmed and RF data transmission is completed, the OFF

mode is normally entered. This stops the crystal oscillator and PLL. If it is desirable to modify the

contents of the configuration register without entering the OFF mode, the Reset_Register_Mode

can be used. To enter the Reset_Register_Mode, the SDIN_TXDIN must be asserted HIGH

while the EN is asserted LOW for at least 10 µs Reset_min time. This state is shown in Figure

6-4 on page 15, State Diagram of Operating Modes. In Reset_Register_Mode, the PA and frac-

tional PLL remain OFF but the XTO remains active. This state must stay for minimum 10 µs. At

the next step you must rise first EN and SDIN_TXDIN 10 µs delayed. While in this mode, the

32 bit configuration register data can be sent on the SPI bus as shown in Figure 6-2 on page 13.

After data transmission, the device can be switched back to OFF_Mode by asserting EN, SCK,

and SDIN_TXDIN to a LOW state. An example of programming from the Reset_Register_Mode

is shown in Figure 6-4 on page 15.

ΔT

XTO

T

PLL

X

X

FSK;

TX_Mode2

ASK:

TX_Mode1 and

TX_Mode2

TX-Data

OFF_

Mode

OFF_Mode

TX_

Mode1

Start_Up_

Mode_2

Start_Up_

Mode_1

32-bit Configuration

CLK (Output)

SCK (Input)

EN (Input)

PA (Output

Power)

SDIN_TXDIN

(Input)