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ATA5749 Datasheet(PDF) 18 Page - ATMEL Corporation |
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ATA5749 Datasheet(HTML) 18 Page - ATMEL Corporation |
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18 / 26 page ![]() 18 9128D–RKE–01/09 ATA5749 [Preliminary] 10. Electrical Characteristics VS = 1.9V to 3.6V Tamb = –40°C to +125°C, CLK_ON = “High”; DIV_CNTRL = “Low”, CLOAD_CLK = 10 pF. fXTO = 13.0000 MHz, f CLK = 1.625 MHz unless otherwise specified. If crystal parameters are important values correspond to a crystal with CM = 4.0 fF, C0 = 1.5 pF, CLOAD = 9 pF and RM ≤ 170Ω. Typical values are given at VS = 3.0V and Tamb = 25°C No. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type* 1 Current Consumption 1.1 Supply current, OFF_Mode V(SDIN_TXDIN,SCK,EN) = Low T amb ≤ +25°C Tamb ≤ +85°C T amb ≤ +125°C 5, 8 I S_Off_Mode 1 20 265 100 350 7000 nA nA nA A 1.2 Supply current, TX_Mode1 VS ≤ 3.0V 5, 8 IS_TX_Mode1 3.6 4.7 mA A 1.3 Supply current, TX_Mode2 V S ≤ 3.0V PWR[0:3] = 8 (5.5 dBm) 5, 8 I S_TX_Mode2 7.3 8.8 mA A 1.4 Supply current, CLK_Only_Mode V S ≤ 3.0V 5, 8 IS_CLK_Only _ Mode 480 680 µA A 1.5 Supply current reduction, Clock Driver off V S ≤ 3.0V CLK_ON = “Low” IS = IS_any_Mode + ΔICLKoff1 (can be applied to all modes except Off_Mode, add Typ. to Typ. and Max. to Max. values) 5, 8 ΔI CLKoff1 –250 –300 µA B 1.6 Supply current increase, Clock Driver higher frequency V S ≤ 3.0V DIV_CNTRL = “High” fCLK =3.24MHz I S= IS_any__Mode + ΔICLKhigh (can be applied to all modes except Off_Mode add Typ. to Typ. and Max. to Max. values) 5, 8 ΔI CLKhigh 150 190 µA B 1.7 Reset_Register_Mode / Configuration_Mode_1 VS ≤ 3.0V 5, 8 IS_Reset_ Register_Mode / I S_Configuration _ Mode_1 680 µA A 1.8 Configuration_Mode_2 / Start_Up_Mode_2 VS ≤ 3.0V 5, 8 IS_Configuration _Mode_2 / I S_Start_Up _Mode_2 4.7 mA A 1.9 Start_Up_Mode_1 V S ≤ 3.0V 5, 8 IS_Start_Up _Mode_1 300 µA A 2 Power Amplifier (PA) 2.1 Output power 1, TX_Mode2 VS = 3.0V, Tamb = 25°C PWR[0:3] = 4 ZLOAD = ZLOPT according Table 4-1 and Table 4-2 on page 9 (5) POUT_1 –1.0 +1.0 +3.0 dBm A *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Note: (Pin Number) in brackets mean they are measured matched to 50 Ω according to Figure 4-2 on page 8 with component values and optimum load impedances according to Table 4-1 and Table 4-2 on page 9 |
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