MAX6621 datasheet(3/18 Pages) MAXIM

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PECI-to-I2C Translator

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ELECTRICAL CHARACTERISTICS (continued)

(

Typical Application Circuit, VCC = +3V to +3.6V, VREF = +0.95V to +1.26V, TA = -20°C to +120°C, unless otherwise noted. Typical

values are at VCC = +3.3V, VREF = +1.0V, TA = +25°C.) (Note 1)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Hysteresis

0.1

x VREF

Low-Level Sinking Current

IIL

0.5

1.0

High-Level Sourcing Current

IIH

-6

Input Capacitance

(Note 2)

Signal-Noise Immunity Above

300MHz

(Note 2)

0.1

x VREF

VP-P

TIMING CHARACTERISTICS

(

Typical Application Circuit, VCC = +3V to +3.6V, VREF = +0.95V to +1.26V, TA = -20°C to +120°C, unless otherwise noted. Typical

values are at VCC = +3.3V, VREF = +1.0V, TA = +25°C.) (Note 2)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

RESET Pulse Width

RST

100

I2C INTERFACE

Serial-Clock Frequency

fSCL

400

kHz

Bus Free Time Between a

STOP and a START Condition

tBUF

1.3

μs

Hold Time, (Repeated) START

Condition

tHD, STA

0.6

μs

Repeated START Condition

Setup Time

tSU, STA

0.6

μs

STOP Condition Setup Time

tSU, STO

0.6

μs

Data Hold Time

tHD, DAT

(Note 3)

0.9

μs

Data Setup Time

tSU, DAT

120

SCL Clock-Low Period

tLOW

1.3

μs

SCL Clock-High Period

tHIGH

0.6

μs

Rise Time of Both SDA and

SCL Signals, Receiving

(Notes 4, 5)

+ 0.1Cb

300

Fall Time of Both SDA and

SCL Signals, Receiving

(Notes 4, 5)

+ 0.1Cb

300

Fall Time of SDA Transmitting

tF.TX

(Notes 4, 5)

+ 0.1Cb

250

Pulse Width of Spike

Suppressed

tSP

(Note 6)

160

Capacitive Load for Each

Bus Line

(Note 4)

400

PECI INTERFACE

Overall time evident on PECI

0.495

500

Bit Time (Note 7)

tBIT

Driven by MAX6621

0.495

250

μs

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