ADE7878ACPZ datasheet(51/92 Pages) AD

51 / 92 page

ADE7878

Rev. 0 | Page 51 of 92

Integration Time Under a Steady Load

The discrete time sample period (T) for the accumulation

sinusoidal signals on the analog inputs and a 90° phase

difference between the voltage and the current signal (the

largest possible reactive power), the average word value

representing the reactive power is PMAX = 33,516,139 =

0x1FF6A6B. If the VARTHR[47:0] threshold is set at the PMAX

level, this means that the DSP generates a pulse that is added at

the var-hour registers every 125 μs.

The maximum value that can be stored in the var-hour accumu-

lation register before it overflows is 231 − 1 or 0x7FFFFFFF. The

integration time is calculated as

Time = 0x7FFF,FFFF × 125 μs = 74 hr 33 min 55 sec

(38)

Energy Accumulation Modes

The reactive power accumulated in each var-hour accumulation

32-bit register (AVARHR, BVARHR, CVARHR, AFVARHR,

BFVARHR, and CFVARHR) depends on the configuration of

Bits[5:4] (CONSEL) in the ACCPMODE[7:0] register, in

correlation with the watt-hour registers. The different

configurations are described in Table 18. Note that IA’/IB’/IC’

are the phase-shifted current waveforms.

Table 18. Inputs to Var-Hour Accumulation Registers

CONSEL[1,0]

AVARHR,

AFVARHR

BVARHR,

BFVARHR

CVARHR,

CFVARHR

VA × IA’

VB × IB’

VC × IC’

VA × IA’

VC × IC’

VA × IA’

VB × IB’

VC x IC’

VB = −VA − VC

VA × IA’

VB × IB’

VC × IC’

VB = −VA

Bits[3:2] (VARACC[1:0]) in the ACCMODE[7:0] register

determine how CF frequency output can be a generated

function of the total active and fundamental powers. While the

var-hour accumulation registers accumulate the reactive power

in a signed format, the frequency output may be generated in

either the signed mode or the sign adjusted mode function of

VARACC[1:0]. See the Energy-to-Frequency Conversion

section for details.

Line Cycle Reactive Energy Accumulation Mode

As mentioned in the Line Cycle Active Energy Accumulation

Mode section, in-line cycle energy accumulation mode, the

energy accumulation can be synchronized to the voltage

channel zero crossings so that reactive energy can be

accumulated over an

integral number of half-line cycles. In this mode, the ADE7878

transfers the reactive energy accumulated in the 32-bit internal

accumulation registers into the xVARHR[31:0] or xFVAR[31:0]

Figure 66. The number of half-line cycles is specified in the

LINECYC[15:0] register.

The line cycle reactive energy accumulation mode is activated

by setting Bit 1 (LVAR) in the LCYCMODE[7:0] register. The

total reactive energy accumulated over an integer number of

half-line cycles or zero crossings is accumulated in the var-hour

accumulation registers after the number of zero crossings

specified in the LINECYC register is detected. When using the

line cycle accumulation mode, Bit 6 (RSTREAD) of the

LCYCMODE[7:0] register should be set to Logic 0 because a

read with the reset of var-hour registers is not available in this

mode.

ZERO-

CROSSING

DETECTION

(PHASE A)

ZERO-

CROSSING

DETECTION

(PHASE B)

CALIBRATION

CONTROL

ZERO-

CROSSING

DETECTION

(PHASE C)

LINECYC[15:0]

AVARHR[31:0]

ZXSEL[0] IN

LCYCMODE[7:0]

ZXSEL[1] IN

LCYCMODE[7:0]

ZXSEL[2] IN

LCYCMODE[7:0]

OUTPUT

FROM

TOTAL

REACTIVE

POWER

ALGORITHM

AVARGAIN

AVAROS

ACCUMULATOR

32-BIT

VARHR[47:0]

Figure 66. Line Cycle Reactive Energy Accumulation Mode

Phase A, Phase B, and Phase C zero crossings are, respectively,

included when counting the number of half-line cycles by

setting Bits[5:3] (ZXSEL) in the LCYCMODE[7:0] register. Any

combination of the zero crossings from all three phases can be

used for counting the zero crossing. Select only one phase at a

time for inclusion in the zero-crossings count during calibration.

For details on setting the LINECYC[15:0] register and Bit 5

(LENERGY) in the MASK0 interrupt mask register associated

with the line cycle accumulation mode, see the Line Cycle

Active Energy Accumulation Mode section.

ADE7878ACPZ Datasheet(PDF) 51 Page - Analog Devices

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