ADE7878ACPZ datasheet(83/92 Pages) AD

83 / 92 page

ADE7878

Rev. 0| Page 83 of 92

Bit

Location

Bit Name

Default

Value

Description

TERMSEL3[1]

Phase B is included in the CF3 outputs calculations.

TERMSEL3[2]

Phase C is included in the CF3 outputs calculations.

10:9

ANGLESEL[1:0]

00: the angles between phase voltages and phase currents are measured.

01: the angles between phase voltages are measured.

10: the angles between phase currents are measured.

11: no angles are measured.

VNOMAEN

When this bit is 0, the apparent power on Phase A is computed regularly.

When this bit is 1, the apparent power on Phase A is computed using the VNOM[23:0] register

instead of the regular measured rms phase voltage.

VNOMBEN

When this bit is 0, the apparent power on Phase B is computed regularly.

When this bit is 1, the apparent power on Phase B is computed using the VNOM[23:0] register

instead of the regular measured rms phase voltage.

VNOMCEN

When this bit is 0, the apparent power on Phase C is computed regularly.

When this bit is 1, the apparent power on Phase C is computed using the VNOM[23:0] register

instead of the regular measured rms phase voltage.

SELFREQ

When the ADE7878 is connected to 50 Hz networks, this bit should be cleared to 0 (default

value). When the ADE7878 is connected to 60 Hz networks, this bit should be set to 1.

Reserved

This bit is 0 by default, and it does not manage any functionality.

Table 38. GAIN Register (Address 0xE60F)

Bit

Bit Name

Default Value

Description

2:0

PGA1[2:0]

000

Phase currents gain selection.

000: gain = 1.

001: gain = 2.

010: gain = 4.

011: gain = 8.

100: gain = 16.

101, 110, 111: reserved. When set, the ADE7878 behaves like PGA1[2:0] = 000.

5:3

ReservedPGA2[2:0]

000

Neutral current gain selection.

000: gain = 1.

001: gain = 2.

010: gain = 4.

011: gain = 8.

100: gain = 16.

101, 110, 111: reserved. When set, the ADE7878 behaves like PGA2[2:0] = 000.

8:6

PGA3[2:0]

000

Phase voltages gain selection.

000: gain = 1.

001: gain = 2.

010: gain = 4.

011: gain = 8.

100: gain = 16.

101, 110, 111: reserved. When set, the ADE7878 behaves like PGA3[2:0] = 000.

15:9

Reserved

000 0000

Reserved. These bits do not manage any functionality.

ADE7878ACPZ Datasheet(PDF) 83 Page - Analog Devices

ADE7878ACPZ Datasheet(HTML) 83 Page - Analog Devices

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