AS2702 – AS-Interface Slave IC

Revision 1.3, 21-Aug-08

Page 7 of 13

Notes:

1

Pulse width depends substantially on value of external pull-up resistor

2

Applies only to data port pins set to 'output/input' operation

3

Timing reference is DSTBn HL-edge.

Applies only to data port pins set to either 'output/input' or 'input' operation

The dc-parameters of the data port pins D3, …, D0 are specified as follows:

Symbol

Parameter

Min

Max

Unit

Note

IOUTLO

Sink current @ output L

10

mA

VOUT = 1V

IOUTHI

Leakage current @ output off

-1

1

µA

1

VSCHLT

Input threshold voltage

2.5

3.5

V

2

VIN

Acceptable input voltage @ output off

-0.3

40

V

Notes:

1

Output stage is low-side open-drain; ext. pull-up resistor required as no pull-up structure on chip

2

No hysteresis implemented

To govern the data transfer at data port D3, …,D0 strobe pin DSTBn is equipped with a low-side open-drain output switch plus a

passive high-side current source with a nom. 10µA pull-up current capability.

However a second function is assigned to the DSTBn pin which requires it to be input as well: if a low-pulse is imposed on DSTBn

by external means with a pulse width of at least 50 to 100ms, the slave device will be put in RESET condition, as described in

section “Reset”.

The dc-and timing parameters of strobe pin DSTBn are specified as follows:

Symbol

Parameter

Min

Max

Unit

Note

IOUTLO

Sink current @ output L

10

mA

VOUT = 1V

IOUTHI

Leakage current @ output off

-10

10

µA

VOUT = 5V

IINLO

Input current @ VIN = 1V

-5

-20

µA

1

VSCHLT

Input threshold voltage

1.5

3.5

V

2

VIN

Acceptable input voltage @ output off

-0.3

40

V

tNORESET

DSTBn L-phase width, not triggering RESET

50

ms

tRESET

DSTBn L-phase width, triggering RESET

100

ms

CPINEXT

Max. stray capacity

20

pF

Notes:

1

DSTBn is equipped with an on-chip pull-up current source, which ensures a sufficiently fast LH-edge upon output switch-off in

open-pin condition, to prevent erroneous RESET triggering. If DSTBn has an external load connected to it, an additional

external pull-up resistor may be needed to prevent erroneous RESET triggering upon output switch-off.

2

No hysteresis implemented

Parameter Port Pins P3, …, P0 and Parameter Strobe Pin PSTBn

(Note that parameter port pins P3, …, P0 are only available on AS2702 package option SOIC 20, not on the SOIC 16 option.)

The transfer of data at P3, …, P0 and the supporting strobe action at pin PSTBn takes place similarly as at D3, …, D0 resp. DSTBn.

Each parameter port pin P3, …, P0 is equipped with both a low-side open-drain output switch plus a passive, but switchable high-

side current source with a nom. 10 µA pull-up current capability, and with an input stage.

Though equipped for bidirectional data transfer as D3, …, D0, the parameter port is nevertheless less flexible than the data port.

Basically the parameter port is set to behave portwise as