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AM1808AZCED3 Datasheet(PDF) 175 Page - Texas Instruments |
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AM1808AZCED3 Datasheet(HTML) 175 Page - Texas Instruments |
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175 / 264 page  AM1808 www.ti.com SPRS653A – FEBRUARY 2010 – REVISED APRIL 2010 6.18.3 I2C Electrical Data/Timing 6.18.3.1 Inter-Integrated Circuit (I2C) Timing Table 6-85 and Table 6-86 assume testing over recommended operating conditions (see Figure 6-41 and Figure 6-42). Table 6-85. Timing Requirements for I2C Input 1.3V, 1.2V, 1.1V, 1.0V NO. PARAMETER Standard Mode Fast Mode UNIT MIN MAX MIN MAX 1 tc(SCL) Cycle time, I2Cx_SCL 10 2.5 ms 2 tsu(SCLH-SDAL) Setup time, I2Cx_SCL high before I2Cx_SDA low 4.7 0.6 ms 3 th(SCLL-SDAL) Hold time, I2Cx_SCL low after I2Cx_SDA low 4 0.6 ms 4 tw(SCLL) Pulse duration, I2Cx_SCL low 4.7 1.3 ms 5 tw(SCLH) Pulse duration, I2Cx_SCL high 4 0.6 ms 6 tsu(SDA-SCLH) Setup time, I2Cx_SDA before I2Cx_SCL high 250 100 ns 7 th(SDA-SCLL) Hold time, I2Cx_SDA after I2Cx_SCL low 0 0 0.9 ms 8 tw(SDAH) Pulse duration, I2Cx_SDA high 4.7 1.3 ms 9 tr(SDA) Rise time, I2Cx_SDA 1000 20 + 0.1Cb 300 ns 10 tr(SCL) Rise time, I2Cx_SCL 1000 20 + 0.1Cb 300 ns 11 tf(SDA) Fall time, I2Cx_SDA 300 20 + 0.1Cb 300 ns 12 tf(SCL) Fall time, I2Cx_SCL 300 20 + 0.1Cb 300 ns 13 tsu(SCLH-SDAH) Setup time, I2Cx_SCL high before I2Cx_SDA high 4 0.6 ms 14 tw(SP) Pulse duration, spike (must be suppressed) N/A 0 50 ns 15 Cb Capacitive load for each bus line 400 400 pF Table 6-86. Switching Characteristics for I2C (1) 1.3V, 1.2V, 1.1V, 1.0V NO. PARAMETER Standard Mode Fast Mode UNIT MIN MAX MIN MAX 16 tc(SCL) Cycle time, I2Cx_SCL 10 2.5 ms 17 tsu(SCLH-SDAL) Setup time, I2Cx_SCL high before I2Cx_SDA low 4.7 0.6 ms 18 th(SDAL-SCLL) Hold time, I2Cx_SCL low after I2Cx_SDA low 4 0.6 ms 19 tw(SCLL) Pulse duration, I2Cx_SCL low 4.7 1.3 ms 20 tw(SCLH) Pulse duration, I2Cx_SCL high 4 0.6 ms 21 tsu(SDAV-SCLH) Setup time, I2Cx_SDA valid before I2Cx_SCL high 250 100 ns 22 th(SCLL-SDAV) Hold time, I2Cx_SDA valid after I2Cx_SCL low 0 0 0.9 ms 23 tw(SDAH) Pulse duration, I2Cx_SDA high 4.7 1.3 ms 28 tsu(SCLH-SDAH) Setup time, I2Cx_SCL high before I2Cx_SDA high 4 0.6 ms (1) I2C must be configured correctly to meet the timings in Table 6-86 . Copyright © 2010, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 175 Submit Documentation Feedback Product Folder Link(s): AM1808 |
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