AM1808AZCED3 datasheet(178/264 Pages) TI

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Bit

Data Bits

UART_TXDn

UART_RXDn

Data Bits

Bit

Start

AM1808

SPRS653A – FEBRUARY 2010 – REVISED APRIL 2010

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6.19.2 UART Electrical Data/Timing

Table 6-88. Timing Requirements for UART Receive(1) (see Figure 6-43)

1.3V, 1.2V, 1.1V, 1.0V

NO.

PARAMETER

UNIT

MIN

MAX

tw(URXDB)

Pulse duration, receive data bit (RXDn)

0.96U

1.05U

tw(URXSB)

Pulse duration, receive start bit

0.96U

1.05U

(1)

U = UART baud time = 1/programmed baud rate.

Table 6-89. Switching Characteristics Over Recommended Operating Conditions for UARTx Transmit(1)

(see Figure 6-43)

1.3V, 1.2V, 1.1V, 1.0V

NO.

PARAMETER

UNIT

MIN

MAX

f(baud)

Maximum programmable baud rate

D/E (2) (3)

MBaud (4)

tw(UTXDB)

Pulse duration, transmit data bit (TXDn)

U - 2

U + 2

tw(UTXSB)

Pulse duration, transmit start bit

U - 2

U + 2

(1)

U = UART baud time = 1/programmed baud rate.

(2)

D = UART input clock in MHz.

For UART0, the UART input clock is SYSCLK2.

For UART1 or UART2, the UART input clock is ASYNC3 (either PLL0_SYCLK2 or PLL1_SYSCLK2).

(3)

E = UART divisor x UART sampling rate. The UART divisor is set through the UART divisor latch registers (DLL and DLH). The UART

sampling rate is set through the over-sampling mode select bit (OSM_SEL) of the UART mode definition register (MDR).

(4)

Baud rate is not indicative of data rate. Actual data rate will be limited by system factors such as EDMA loading, EMIF/DDR loading,

system frequency, etc.

Figure 6-43. UART Transmit/Receive Timing

178

Peripheral Information and Electrical Specifications

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