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AM1808AZCED3 Datasheet(PDF) 221 Page - Texas Instruments |
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AM1808AZCED3 Datasheet(HTML) 221 Page - Texas Instruments |
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221 / 264 page  AM1808 www.ti.com SPRS653A – FEBRUARY 2010 – REVISED APRIL 2010 6.26.1 uPP Register Descriptions Table 6-115 shows the uPP registers. Table 6-115. Universal Parallel Port (uPP) Registers BYTE ADDRESS ACRONYM REGISTER DESCRIPTION 0x01E1 6000 UPPID uPP Peripheral Identification Register 0x01E1 6004 UPPCR uPP Peripheral Control Register 0x01E1 6008 UPDLB uPP Digital Loopback Register 0x01E1 6010 UPCTL uPP Channel Control Register 0x01E1 6014 UPICR uPP Interface Configuration Register 0x01E1 6018 UPIVR uPP Interface Idle Value Register 0x01E1 601C UPTCR uPP Threshold Configuration Register 0x01E1 6020 UPISR uPP Interrupt Raw Status Register 0x01E1 6024 UPIER uPP Interrupt Enabled Status Register 0x01E1 6028 UPIES uPP Interrupt Enable Set Register 0x01E1 602C UPIEC uPP Interrupt Enable Clear Register 0x01E1 6030 UPEOI uPP End-of-Interrupt Register 0x01E1 6040 UPID0 uPP DMA Channel I Descriptor 0 Register 0x01E1 6044 UPID1 uPP DMA Channel I Descriptor 1 Register 0x01E1 6048 UPID2 uPP DMA Channel I Descriptor 2 Register 0x01E1 6050 UPIS0 uPP DMA Channel I Status 0 Register 0x01E1 6054 UPIS1 uPP DMA Channel I Status 1 Register 0x01E1 6058 UPIS2 uPP DMA Channel I Status 2 Register 0x01E1 6060 UPQD0 uPP DMA Channel Q Descriptor 0 Register 0x01E1 6064 UPQD1 uPP DMA Channel Q Descriptor 1 Register 0x01E1 6068 UPQD2 uPP DMA Channel Q Descriptor 2 Register 0x01E1 6070 UPQS0 uPP DMA Channel Q Status 0 Register 0x01E1 6074 UPQS1 uPP DMA Channel Q Status 1 Register 0x01E1 6078 UPQS2 uPP DMA Channel Q Status 2 Register Copyright © 2010, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 221 Submit Documentation Feedback Product Folder Link(s): AM1808 |
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