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EP7311 Datasheet(PDF) 29 Page - Cirrus Logic |
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EP7311 Datasheet(HTML) 29 Page - Cirrus Logic |
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29 / 58 page ![]() DS506F1 ©Copyright Cirrus Logic, Inc. 2005 (All Rights Reserved) 29 EP7311 High-Performance, Low-Power System on Chip JTAG Interface Parameter Symbol Min Max Units TCK clock period tclk_per 2- ns TCK clock high time tclk_high 1- ns TCK clock low time tclk_low 1- ns JTAG port setup time tJPs -0 ns JTAG port hold time tJPh -3 ns JTAG port clock to output tJPco -10 ns JTAG port high impedance to valid output tJPzx -12 ns JTAG port valid output to high impedance tJPxz -19 ns TDO TCK TDI TMS t JPh t clk_high t clk_low t JPzx t JPco t JPxz t clk_per t JPs Figure 14. JTAG Timing Measurement |
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