LPC2930 datasheet(49/98 Pages) NXP

49 / 98 page

LPC2930_3

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Product data sheet

Rev. 03 — 16 April 2010

49 of 98

NXP Semiconductors

LPC2930

ARM9 microcontroller with CAN, LIN, and USB

6.14.2 Clock Generation Unit (CGU0)

The key features are:

• Generation of 9 base clocks, one test base clock, and two base clocks to drive CGU1,

selectable from several embedded clock sources

• Crystal oscillator with power-down

• Control PLL with power-down

• Very low-power ring oscillator, always on to provide a safe clock

• Seven fractional clock dividers with L/D division

• Individual source selector for each base clock, with glitch-free switching

• Autonomous clock-activity detection on every clock source

• Protection against switching to invalid or inactive clock sources

• Embedded frequency counter

• Register write-protection mechanism to prevent unintentional alteration of clocks

Remark: Any clock-frequency adjustment has a direct impact on the timing of all on-board

peripherals.

6.14.2.1

Functional description

The clock generation unit provides 10 internal clock sources as described in Table 26.

[1]

Maximum frequency that guarantees stable operation of the LPC2930.

[2]

Fixed to low-power oscillator.

For generation of these base clocks, the CGU consists of primary and secondary clock

generators and one output generator for each base clock.

Table 26.

CGU0 base clocks

Number Name

Frequency

(MHz) [1]

Description

BASE_SAFE_CLK

0.4

base safe clock (always on)

BASE_SYS_CLK

125

base system clock

BASE_PCR_CLK

0.4 [2]

base PCR subsystem clock

BASE_IVNSS_CLK

125

base IVNSS subsystem clock

BASE_MSCSS_CLK

125

base MSCSS subsystem clock

BASE_ICLK0_CLK

125

base internal clock 0, for CGU1

BASE_UART_CLK

125

base UART clock

BASE_SPI_CLK

base SPI clock

BASE_TMR_CLK

125

base timers clock

BASE_ADC_CLK

4.5

base ADC clock

reserved

BASE_ICLK1_CLK

125

base internal clock 1, for CGU1

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